other persons with the same name:
2008 | ||
---|---|---|
13 | EE | Andreas Meier, Mehul Motani, Siquan Hu, Simon Künzli: DiMo: distributed node monitoring in wireless sensor networks. MSWiM 2008: 117-121 |
2007 | ||
12 | EE | Simon Künzli, Arne Hamann, Rolf Ernst, Lothar Thiele: Combined approach to system level performance analysis of embedded systems. CODES+ISSS 2007: 63-68 |
2006 | ||
11 | EE | Simon Künzli, Francesco Poletti, Luca Benini, Lothar Thiele: Combining simulation and formal methods for system-level performance analysis. DATE 2006: 236-241 |
10 | Simon Künzli, Lothar Thiele: Generating event traces based on arrival curves. MMB 2006: 81-98 | |
2004 | ||
9 | EE | Alexander Maxiaguine, Simon Künzli, Samarjit Chakraborty, Lothar Thiele: Rate analysis for streaming applications with on-chip buffer constraints. ASP-DAC 2004: 131-136 |
8 | EE | Alexander Maxiaguine, Simon Künzli, Lothar Thiele: Workload Characterization Model for Tasks with Variable Execution Demand. DATE 2004: 1040-1045 |
7 | EE | Eckart Zitzler, Simon Künzli: Indicator-Based Selection in Multiobjective Search. PPSN 2004: 832-842 |
6 | EE | Alexander Maxiaguine, Samarjit Chakraborty, Simon Künzli, Lothar Thiele: Evaluating Schedulers for Multimedia Processing on Buffer-Constrained SoC Platforms. IEEE Design & Test of Computers 21(5): 368-377 (2004) |
2003 | ||
5 | EE | Samarjit Chakraborty, Simon Künzli, Lothar Thiele: A General Framework for Analysing System Properties in Platform-Based Embedded System Designs. DATE 2003: 10190-10195 |
4 | Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister: Performance evaluation of network processor architectures: combining simulation with analytical estimation. Computer Networks 41(5): 641-665 (2003) | |
2002 | ||
3 | EE | Samarjit Chakraborty, Thomas Erlebach, Simon Künzli, Lothar Thiele: Schedulability of event-driven code blocks in real-time embedded systems. DAC 2002: 616-621 |
2 | EE | Lothar Thiele, Samarjit Chakraborty, Matthias Gries, Simon Künzli: A framework for evaluating design tradeoffs in packet processing architectures. DAC 2002: 880-885 |
1 | EE | Samarjit Chakraborty, Simon Künzli, Lothar Thiele: Approximate Schedulability Analysis. IEEE Real-Time Systems Symposium 2002: 159-168 |
1 | Luca Benini | [11] |
2 | Samarjit Chakraborty | [1] [2] [3] [4] [5] [6] [9] |
3 | Thomas Erlebach | [3] |
4 | Rolf Ernst | [12] |
5 | Matthias Gries | [2] |
6 | Arne Hamann | [12] |
7 | Andreas Herkersdorf | [4] |
8 | Siquan Hu | [13] |
9 | Alexander Maxiaguine | [6] [8] [9] |
10 | Andreas Meier | [13] |
11 | Mehul Motani | [13] |
12 | Francesco Poletti | [11] |
13 | Patricia Sagmeister | [4] |
14 | Lothar Thiele | [1] [2] [3] [4] [5] [6] [8] [9] [10] [11] [12] |
15 | Eckart Zitzler | [7] |