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Song Chen

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2009
28EEBei Yu, Sheqin Dong, Satoshi Goto, Song Chen: Voltage-island driven floorplanning considering level-shifter positions. ACM Great Lakes Symposium on VLSI 2009: 51-56
27EESong Chen, Zheng Xu, Takeshi Yoshimura: A generalized V-shaped multilevel method for large scale floorplanning. ISQED 2009: 734-739
2008
26EESong Chen, Takeshi Yoshimura: Fixed-Outline Floorplanning: Block-Position Enumeration and a New Method for Calculating Area Costs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 858-871 (2008)
2007
25EESong Chen, Takeshi Yoshimura: A stable fixed-outline floorplanning method. ISPD 2007: 119-126
24EEChuanfu Chen, Qiong Tang, Yuan Yu, Zhiqiang Wu, Xuan Huang, Song Chen, Haiying Hua, Conjing Ran, Mojun Li: An Assessment of the Currency of Free Science Information on the Web. WISE Workshops 2007: 493-504
23EELiangwei Ge, Song Chen, Kazutoshi Wakabayashi, Takashi Takenaka, Takeshi Yoshimura: Max-Flow Scheduling in High-Level Synthesis. IEICE Transactions 90-A(9): 1940-1948 (2007)
2006
22EESong Chen, Takeshi Yoshimura: On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence. APCCAS 2006: 1867-1870
21EEHongjie Bai, Sheqin Dong, Xianlong Hong, Song Chen: Buffer planning based on block exchanging. ISCAS 2006
2005
20EEHongjie Bai, Sheqin Dong, Xianlong Hong, Song Chen: A New Buffer Planning Algorithm Based on Room Resizing. EUC 2005: 291-299
19EEYuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng: Performance constrained floorplanning based on partial clustering [IC layout]. ISCAS (2) 2005: 1863-1866
18EESong Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng: VLSI block placement with alignment constraints based on corner block list. ISCAS (6) 2005: 6222-6225
17EEYuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng: Buffer Planning Algorithm Based on Partial Clustered Floorplanning. ISQED 2005: 213-219
16EESong Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng: Floorplanning with Consideration of White Space Resource Distribution for Repeater Planning. ISQED 2005: 628-633
15EEYuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng, Jun Gu: Buffer planning as an Integral part of floorplanning with consideration of routing congestion. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 609-621 (2005)
2004
14EESong Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu: A buffer planning algorithm with congestion optimization. ASP-DAC 2004: 615-620
13EEYuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu: Buffer allocation algorithm with consideration of routing congestion. ASP-DAC 2004: 621-623
12EESong Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng, Jun Gu: Fast Evaluation of Bounded Slice-Line Grid. J. Comput. Sci. Technol. 19(6): 973-980 (2004)
2003
11EEYuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu: Dynamic global buffer planning optimization based on detail block locating and congestion analysis. DAC 2003: 806-811
10EESong Chen, Shan Wang, Ming-Tian Zhou: Mobile Middleware Based on Distributed Object. GCC (1) 2003: 833-838
9EESong Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Yici Cai, Chung-Kuan Cheng, Jun Gu: Evaluating a bounded slice-line grid assignment in O(nlogn) time. ISCAS (4) 2003: 708-711
8EEYuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Song Chen, Chung-Kuan Cheng, Jun Gu: Arbitrary convex and concave rectilinear block packing based on corner block list. ISCAS (5) 2003: 493-496
7EEYuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu: An integrated floorplanning with an efficient buffer planning algorithm. ISPD 2003: 136-142
2000
6EESong Chen, Adam Postula: Synthesis of custom interleaved memory systems. IEEE Trans. VLSI Syst. 8(1): 74-83 (2000)
1999
5EESong Chen, Adam Postula, Lech Józwiak: Synthesis of XOR Storage Schemes with Different Cost for Minimization of Memory Contention. EUROMICRO 1999: 1170-1177
1998
4EEAdam Postula, Song Chen, Lech Józwiak, David Abramson: Automated Synthesis of Interleaved Memory Systems for Custom Computing Machine. EUROMICRO 1998: 10115-10122
1995
3 Song Chen, Mary Mehrnoosh Eshaghian, Ying-Chieh Wu: Mapping Arbitrary Non-Uniform Task Graphs onto Arbitrary Non-Uniform System Graphs. ICPP (2) 1995: 191-195
2EESong Chen, Mary Mehrnoosh Eshaghian: A fast recursive mapping algorithm. Concurrency - Practice and Experience 7(5): 391-409 (1995)
1EESong Chen, Mary Mehrnoosh Eshaghian, Richard F. Freund, J. L. Potter, Ying-Chieh Wu: Evaluation of Two Programming Paradigms for Heterogeneous Computing. J. Parallel Distrib. Comput. 31(1): 41-55 (1995)

Coauthor Index

1David Abramson [4]
2Hongjie Bai [20] [21]
3Yici Cai [7] [8] [9] [11] [13] [14]
4Chuanfu Chen [24]
5Chung-Kuan Cheng [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19]
6Sheqin Dong [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [28]
7Mary Mehrnoosh Eshaghian [1] [2] [3]
8Richard F. Freund [1]
9Liangwei Ge [23]
10Satoshi Goto [28]
11Jun Gu [7] [8] [9] [11] [12] [13] [14] [15]
12Xianlong Hong [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21]
13Haiying Hua [24]
14Xuan Huang [24]
15Lech Józwiak [4] [5]
16Mojun Li [24]
17Yuchun Ma [7] [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19]
18Adam Postula [4] [5] [6]
19J. L. Potter [1]
20Conjing Ran [24]
21Takashi Takenaka [23]
22Qiong Tang [24]
23Kazutoshi Wakabayashi [23]
24Shan Wang [10]
25Ying-Chieh Wu [1] [3]
26Zhiqiang Wu [24]
27Zheng Xu [27]
28Takeshi Yoshimura [22] [23] [25] [26] [27]
29Bei Yu [28]
30Yuan Yu [24]
31Ming-Tian Zhou [10]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)