2008 |
7 | EE | Tatsuya Ezaki,
Dondee Navarro,
Youichi Takeda,
N. Sadachika,
G. Suzuki,
Mitiko Miura-Mattausch,
Hans Jürgen Mattausch,
Tatsuya Ohguro,
T. Iizuka,
M. Taguchi,
Shigetaka Kumashiro,
S. Miyamoto:
Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations.
Mathematics and Computers in Simulation 79(4): 1096-1106 (2008) |
2007 |
6 | EE | Yoshioki Isobe,
Kiyohito Hara,
Dondee Navarro,
Youichi Takeda,
Tatsuya Ezaki,
Mitiko Miura-Mattausch:
Shot Noise Modeling in Metal-Oxide-Semiconductor Field Effect Transistors under Sub-Threshold Condition.
IEICE Transactions 90-C(4): 885-894 (2007) |
2005 |
5 | EE | Masahiro Murakawa,
Mitiko Miura-Mattausch,
Tetsuya Higuchi:
Towards automatic parameter extraction for surface-potential-based MOSFET models with the genetic algorithm.
ASP-DAC 2005: 204-207 |
4 | EE | Shizunori Matsumoto,
Hiroaki Ueno,
Satoshi Hosokawa,
Toshihiko Kitamura,
Mitiko Miura-Mattausch,
Hans Jürgen Mattausch,
Tatsuya Ohguro,
Shigetaka Kumashiro,
Tetsuya Yamaguchi,
Kyoji Yamashita,
Noriaki Nakayama:
1/f-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation.
IEICE Transactions 88-C(2): 247-254 (2005) |
3 | EE | Dondee Navarro,
Takeshi Mizoguchi,
Masami Suetake,
Kazuya Hisamitsu,
Hiroaki Ueno,
Mitiko Miura-Mattausch,
Hans Jürgen Mattausch,
Shigetaka Kumashiro,
Tetsuya Yamaguchi,
Kyoji Yamashita,
Noriaki Nakayama:
A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential.
IEICE Transactions 88-C(5): 1079-1086 (2005) |
2004 |
2 | EE | Mitiko Miura-Mattausch:
MOSFET modeling for RF-CMOS design.
ASP-DAC 2004: 482-490 |
1994 |
1 | EE | Mitiko Miura-Mattausch:
Analytical MOSFET model for quarter micron technologies.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(5): 610-615 (1994) |