| 2009 |
|---|
| 108 | EE | Seung Eun Lee,
Chris Wilkerson,
Ming Zhang,
Rajendra Yavatkar,
Shih-Lien Lu,
Nader Bagherzadeh:
Low power adaptive pipeline based on instruction isolation.
ISQED 2009: 788-793 |
| 107 | EE | Jun Ho Bahn,
Jung Sook Yang,
Wen-Hsiang Hu,
Nader Bagherzadeh:
Parallel FFT Algorithms on Network-on-Chips.
Journal of Circuits, Systems, and Computers 18(2): 255-269 (2009) |
| 106 | EE | Nader Bagherzadeh,
Masaru Matsuura:
Performance Impact of Task-to-Task Communication Protocol in Network-on-Chip.
Journal of Circuits, Systems, and Computers 18(2): 283-294 (2009) |
| 2008 |
|---|
| 105 | EE | Seung Eun Lee,
Jun Ho Bahn,
Yoon Seok Yang,
Nader Bagherzadeh:
A Generic Network Interface Architecture for a Networked Processor Array (NePA).
ARCS 2008: 247-260 |
| 104 | | Hala Elsadek,
Hesham Eldeeb,
Haytham Abdallah,
Maha Eldesouky,
Nader Bagherzadeh:
Specific Absorption Rate Calculation using Parallel 3D Finite Difference Time Domain Technique.
Communications in Computing 2008: 153-159 |
| 103 | | Faruk Bagci,
Theo Ungerer,
Nader Bagherzadeh:
ESTR - Energy Saving Token Ring Protocol for Wireless Sensor Networks.
ICWN 2008: 3-9 |
| 102 | EE | Jun Ho Bahn,
Jungsook Yang,
Nader Bagherzadeh:
Parallel FFT Algorithms on Network-on-Chips.
ITNG 2008: 1087-1093 |
| 101 | EE | Nader Bagherzadeh,
Masaru Matsuura:
Performance Impact of Task-to-Task Communication Protocol in Network-on-Chip.
ITNG 2008: 1101-1106 |
| 100 | EE | Afshin Niktash,
Hooman Parizi,
Amir Hosein Kamalizad,
Nader Bagherzadeh:
RECFEC: A Reconfigurable FEC Processor for Viterbi, Turbo, Reed-Solomon and LDPC Coding.
WCNC 2008: 605-610 |
| 99 | EE | Nozar Tabrizi,
Nader Bagherzadeh:
An ASIC design and formal analysis of a novel pipelined and parallel sorting accelerator.
Integration 41(1): 65-75 (2008) |
| 98 | EE | Jun Ho Bahn,
Seung Eun Lee,
Yoon Seok Yang,
Jungsook Yang,
Nader Bagherzadeh:
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture.
Parallel Processing Letters 18(2): 239-255 (2008) |
| 2007 |
|---|
| 97 | EE | Afshin Niktash,
Hooman Parizi,
Nader Bagherzadeh:
A Reconfigurable Processor for Forward Error Correction.
ARCS 2007: 1-13 |
| 96 | EE | Bita Gorjiara,
Nader Bagherzadeh,
Pai H. Chou:
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost.
ASP-DAC 2007: 872-877 |
| 95 | | Fredy Rivera,
Marcos Sanchez-Elez,
Nader Bagherzadeh:
Configuration and Data Scheduling for Executing Dynamic Applications onto Multi-Context Reconfigurable Architectures.
ERSA 2007: 85-91 |
| 94 | EE | Akira Hatanaka,
Nader Bagherzadeh:
A Modulo Scheduling Algorithm for a Coarse-Grain Reconfigurable Array Template.
IPDPS 2007: 1-8 |
| 93 | EE | Afshin Niktash,
Hooman Parizi,
Nader Bagherzadeh:
Application of a Heterogeneous Reconfigurable Architecture to OFDM Wireless Systems.
ISCAS 2007: 2586-2589 |
| 92 | EE | Jun Ho Bahn,
Seung Eun Lee,
Nader Bagherzadeh:
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture.
ITNG 2007: 1033-1038 |
| 91 | EE | Seung Eun Lee,
Jun Ho Bahn,
Nader Bagherzadeh:
Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP).
SBAC-PAD 2007: 211-218 |
| 90 | EE | Bita Gorjiara,
Nader Bagherzadeh,
Pai H. Chou:
Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling.
ACM Trans. Design Autom. Electr. Syst. 12(4): (2007) |
| 2006 |
|---|
| 89 | EE | Seung Eun Lee,
Nader Bagherzadeh:
Increasing the throughput of an adaptive router in network-on-chip (NoC).
CODES+ISSS 2006: 82-87 |
| 88 | EE | Javier Davila,
Alfonso de Torres,
Jose Manuel Sanchez,
Marcos Sanchez-Elez,
Nader Bagherzadeh,
Fredy Rivera:
Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys).
DATE Designers' Forum 2006: 52-57 |
| 87 | EE | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures.
FPL 2006: 1-8 |
| 86 | EE | Hooman Parizi,
Afshin Niktash,
Amir Hosein Kamalizad,
Nader Bagherzadeh:
A Reconfigurable Architecture for Wireless Communication Systems.
ITNG 2006: 250-255 |
| 85 | EE | Afshin Niktash,
Hooman Parizi,
Nader Bagherzadeh:
A Multi-Standard Viterbi Decoder for Mobile Applications Using a Reconfigurable Architecture.
VTC Fall 2006: 1-5 |
| 2005 |
|---|
| 84 | | Nader Bagherzadeh,
Mateo Valero,
Alex Ramírez:
Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005
ACM 2005 |
| 83 | EE | Amir Hosein Kamalizad,
Nozar Tabrizi,
Nader Bagherzadeh,
Akira Hatanaka:
A Programmable DSP Architecture for Wireless Communication Systems.
ASAP 2005: 231-238 |
| 82 | EE | Fredy Rivera,
Milagros Fernández,
Nader Bagherzadeh:
An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures.
DSD 2005: 396-402 |
| 81 | EE | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures.
IPDPS 2005 |
| 2004 |
|---|
| 80 | EE | Bita Gorjiara,
Pai H. Chou,
Nader Bagherzadeh,
Mehrdad Reshadi,
David Jensen:
Fast and efficient voltage scheduling by evolutionary slack distribution.
ASP-DAC 2004: 659-662 |
| 79 | EE | Fredy Rivera,
Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures.
CODES+ISSS 2004: 30-35 |
| 78 | EE | Nozar Tabrizi,
Nader Bagherzadeh,
Amir Hosein Kamalizad,
Haitao Du:
MaRS: a macro-pipelined reconfigurable system.
Conf. Computing Frontiers 2004: 343-349 |
| 77 | EE | Bita Gorjiara,
Nader Bagherzadeh,
Pai H. Chou:
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes.
ISLPED 2004: 381-386 |
| 2003 |
|---|
| 76 | EE | Arezou Koohi,
Nader Bagherzadeh,
Chengzi Pan:
A fast parallel reed-solomon decoder on a reconfigurable architecture.
CODES+ISSS 2003: 59-64 |
| 75 | EE | Marcos Sanchez-Elez,
Milagros Fernández,
Manuel L. Anido,
Haitao Du,
Nader Bagherzadeh,
Román Hermida:
Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures.
DATE 2003: 10036-10043 |
| 74 | EE | Chengzhi Pan,
Nader Bagherzadeh,
Amir Hosein Kamalizad,
Arezou Koohi:
Design and Analysis of a Programmable Single-Chip Architecture for DVB-T Base-Band Receiver.
DATE 2003: 10468-10475 |
| 73 | EE | Haitao Du,
Marcos Sanchez-Elez,
Nozar Tabrizi,
Nader Bagherzadeh,
Manuel L. Anido,
Milagros Fernández:
Interactive Ray Tracing on Reconfigurable SIMD MorphoSys.
DATE 2003: 20144-20149 |
| 72 | | Alexander Paar,
Haitao Du,
Nader Bagherzadeh:
A Component Oriented Simulator for HW/SW Co-Designs.
ESTImedia 2003: 79-86 |
| 71 | | Miguel Sainz,
Antonio Susin,
Nader Bagherzadeh:
Camera calibration of long image sequences with the presence of occlusions.
ICIP (1) 2003: 317-320 |
| 70 | EE | Amir Hosein Kamalizad,
Chengzhi Pan,
Nader Bagherzadeh:
Fast Parallel FFT on a Reconfigurable Computation Platform.
SBAC-PAD 2003: 254-259 |
| 69 | EE | Girish Venkataramani,
Walid A. Najjar,
Fadi J. Kurdahi,
Nader Bagherzadeh,
A. P. Wim Böhm,
Jeffrey Hammes:
Automatic compilation to a coarse-grained reconfigurable system-opn-chip.
ACM Trans. Embedded Comput. Syst. 2(4): 560-589 (2003) |
| 68 | EE | Marcos Sanchez-Elez,
Haitao Du,
Nozar Tabrizi,
Yun Long,
Nader Bagherzadeh,
Milagros Fernández:
Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture.
Computers & Graphics 27(5): 701-713 (2003) |
| 2002 |
|---|
| 67 | EE | Jinfeng Liu,
Pai H. Chou,
Nader Bagherzadeh:
Communication speed selection for embedded systems with networked voltage-scalable processors.
CODES 2002: 169-174 |
| 66 | EE | Marcos Sanchez-Elez,
Milagros Fernández,
Rafael Maestre,
Rafael Maestre,
Fadi J. Kurdahi,
Román Hermida,
Nader Bagherzadeh:
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures.
DATE 2002: 547-552 |
| 65 | EE | Manuel Lois Anido,
Alexander Paar,
Nader Bagherzadeh:
Improving the Operation Autonomy of SIMD Processing Elements by Using Guarded Instructions and Pseudo Branches.
DSD 2002: 148-155 |
| 64 | EE | Alexander Paar,
Manuel L. Anido,
Nader Bagherzadeh:
A Novel Predication Scheme for a SIMD System-on-Chip.
Euro-Par 2002: 834-843 |
| 63 | EE | Hooman Parizi,
Afshin Niktash,
Nader Bagherzadeh,
Fadi J. Kurdahi:
MorphoSys: A Coarse Grain Reconfigurable Architecture for Multimedia Applications (Research Note).
Euro-Par 2002: 844-848 |
| 62 | EE | Nader Bagherzadeh,
Pai H. Chou,
Jinfeng Liu:
Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors.
ISSS 2002: 14-19 |
| 61 | EE | Miguel Sainz,
Nader Bagherzadeh,
Antonio Susin:
Recovering 3D Metric Structure and Motion from Multiple Uncalibrated Cameras.
ITCC 2002: 268-273 |
| 60 | EE | Jinfeng Liu,
Pai H. Chou,
Nader Bagherzadeh:
Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources.
PACS 2002: 84-98 |
| 59 | EE | Manuel L. Anido,
Nader Bagherzadeh,
Nozar Tabrizi,
Haitao Du,
Marcos Sanchez-Elez:
Interactive Ray Tracing Using a SIMD Reconfigurable Architecture.
SBAC-PAD 2002: 20-28 |
| 58 | EE | Dexin Li,
Pai H. Chou,
Nader Bagherzadeh:
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems.
VLSI Design 2002: 697-704 |
| 2001 |
|---|
| 57 | EE | Girish Venkataramani,
Walid A. Najjar,
Fadi J. Kurdahi,
Nader Bagherzadeh,
A. P. Wim Böhm:
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture.
CASES 2001: 116-125 |
| 56 | EE | Jinfeng Liu,
Pai H. Chou,
Nader Bagherzadeh,
Fadi J. Kurdahi:
A constraint-based application model and scheduling techniques for power-aware systems.
CODES 2001: 153-158 |
| 55 | EE | Jinfeng Liu,
Pai H. Chou,
Nader Bagherzadeh,
Fadi J. Kurdahi:
Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems.
DAC 2001: 840-845 |
| 54 | | Marcos Sanchez-Elez,
Milagros Fernández,
Román Hermida,
Rafael Maestre,
Fadi J. Kurdahi,
Nader Bagherzadeh:
A data scheduler for multi-context reconfigurable architectures.
ISSS 2001: 177-182 |
| 53 | EE | Rafael Maestre,
F. Kurdahl,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh,
Hartej Singh:
A formal approach to context scheduling for multicontext reconfigurable architectures.
IEEE Trans. VLSI Syst. 9(1): 173-185 (2001) |
| 52 | EE | Rafael Maestre,
Fadi J. Kurdahi,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh,
Hartej Singh:
A framework for reconfigurable computing: task scheduling and context management.
IEEE Trans. VLSI Syst. 9(6): 858-873 (2001) |
| 2000 |
|---|
| 51 | EE | Hartej Singh,
Guangming Lu,
Eliseu M. Chaves Filho,
Rafael Maestre,
Ming-Hau Lee,
Fadi J. Kurdahi,
Nader Bagherzadeh:
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications.
DAC 2000: 573-578 |
| 50 | EE | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh:
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures.
FCCM 2000: 297-298 |
| 49 | EE | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh:
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures.
ICCD 2000: 575-576 |
| 48 | EE | Rafael Maestre,
Fadi J. Kurdahi,
Milagros Fernández,
Nader Bagherzadeh,
Hartej Singh:
Configuration Management in Multi-Context Reconfigurable Systems for Simultaneous Performance and Power Optimization.
ISSS 2000: 107-114 |
| 47 | | Fadi J. Kurdahi,
Nader Bagherzadeh,
Peter Athanas,
Jose L. Muñoz:
Guest Editors' Introduction: Configurable Computing.
IEEE Design & Test of Computers 17(1): 17-19 (2000) |
| 46 | EE | Hartej Singh,
Ming-Hau Lee,
Guangming Lu,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Eliseu M. Chaves Filho:
MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications.
IEEE Trans. Computers 49(5): 465-481 (2000) |
| 45 | EE | Ming-Hau Lee,
Hartej Singh,
Guangming Lu,
Nader Bagherzadeh,
Fadi J. Kurdahi,
Eliseu M. Chaves Filho,
Vladimir Castro Alves:
Design and Implementation of the MorphoSys Reconfigurable Computing Processor.
VLSI Signal Processing 24(2-3): 147-164 (2000) |
| 1999 |
|---|
| 44 | EE | Rafael Maestre,
Fadi J. Kurdahi,
Nader Bagherzadeh,
Hartej Singh,
Román Hermida,
Milagros Fernández:
Kernel Scheduling in Reconfigurable Computing.
DATE 1999: 90-96 |
| 43 | EE | Guangming Lu,
Hartej Singh,
Ming-Hau Lee,
Nader Bagherzadeh,
Fadi J. Kurdahi,
Eliseu M. Chaves Filho:
The MorphoSys Parallel Reconfigurable System.
Euro-Par 1999: 727-734 |
| 42 | EE | Guangming Lu,
Hartej Singh,
Ming-Hau Lee,
Nader Bagherzadeh,
Fadi J. Kurdahi,
Eliseu M. Chaves Filho,
Vladimir Castro Alves:
The MorphoSys Dynamically Reconfigurable System-on-Chip.
Evolvable Hardware 1999: 152-160 |
| 41 | | Guangming Lu,
Ming-Hau Lee,
Hartej Singh,
Nader Bagherzadeh,
Fadi J. Kurdahi,
Eliseu M. Chaves Filho:
MorphoSys: A Reconfigurable Processor Trageted to High Performance Image Application.
IPPS/SPDP Workshops 1999: 661-669 |
| 40 | EE | Rafael Maestre,
Milagros Fernández,
Román Hermida,
Nader Bagherzadeh:
A Framework for Scheduling and Context Allocation in Reconfigurable Computing.
ISSS 1999: 134-140 |
| 1998 |
|---|
| 39 | EE | Marcelo M. de Azevedo,
Nader Bagherzadeh,
Shahram Latifi:
Low Expansion Packings and Embeddings of Hypercubes into Star Graphs: A Performance-Oriented Approach.
IEEE Trans. Parallel Distrib. Syst. 9(3): 261-274 (1998) |
| 38 | EE | Steven Wallace,
Nader Bagherzadeh:
Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors.
IEEE Trans. Parallel Distrib. Syst. 9(6): 570-578 (1998) |
| 37 | EE | S. Shoari,
Nader Bagherzadeh,
D. Goodman,
Thomas E. Milner,
D. J. Smithies,
J. S. Nelson:
A parallel algorithm for pulsed laser infrared tomography.
Pattern Recognition Letters 19(5-6): 521-526 (1998) |
| 36 | | Nader Bagherzadeh,
Martin Dowd,
Shahram Latifi:
Faster column operations in star networks.
Telecommunication Systems 10(1): 33-44 (1998) |
| 1997 |
|---|
| 35 | EE | Steven Wallace,
Nader Bagherzadeh:
Multiple Branch and Block Prediction.
HPCA 1997: 94- |
| 34 | | Shahram Latifi,
Nader Bagherzadeh:
On Embedding Rings into a Star-Related Network.
Inf. Sci. 99(1-2): 21-35 (1997) |
| 1996 |
|---|
| 33 | | Marcelo Moraes de Azevdeo,
Nader Bagherzadeh,
Shahram Latifi:
Variable-Dilation Embeddings of Hypercubes into Star Graphs: Performance Metrics, Mapping Functions, and Routing.
Euro-Par, Vol. I 1996: 247-252 |
| 32 | | Steven Wallace,
Nader Bagherzadeh:
Instruction Fetching Mechanisms for Superscalar Microprocessors.
Euro-Par, Vol. II 1996: 747-756 |
| 31 | EE | Manu Gulati,
Nader Bagherzadeh:
Performance Study of a Multithreaded Superscalar Microprocessor.
HPCA 1996: 291-301 |
| 30 | | Shahram Latifi,
Nader Bagherzadeh:
Hamiltonicity of the Clustered-Star Graph with Embedding Applications.
PDPTA 1996: 734-744 |
| 29 | | Nader Bagherzadeh,
Martin Dowd,
Nayla Nassif:
Embedding an Arbitrary Binary Tree into the Star Graph.
IEEE Trans. Computers 45(4): 475-481 (1996) |
| 28 | EE | Marcelo M. de Azevedo,
Nader Bagherzadeh,
Martin Dowd,
Shahram Latifi:
Some Topological Properties of Star Connected Cycles.
Inf. Process. Lett. 58(2): 81-85 (1996) |
| 27 | EE | Nayla Nassif,
Nader Bagherzadeh:
A Grid Embedding into the Star Graph for Image Analysis Solutions.
Inf. Process. Lett. 60(5): 255-260 (1996) |
| 1995 |
|---|
| 26 | EE | Marcelo M. de Azevedo,
Nader Bagherzadeh,
Shahram Latifi:
Fault-diameter of the star-connected cycles interconnection network.
HICSS (2) 1995: 469-478 |
| 25 | EE | Steven Wallace,
Nirav Dagli,
Nader Bagherzadeh:
Design and implementation of a 100 MHz centralized instruction window for a superscalar microprocessor.
ICCD 1995: 96-101 |
| 24 | EE | Nader Bagherzadeh,
Martin Dowd,
Shahram Latifi:
A Well-Behaved Enumeration of Star Graphs.
IEEE Trans. Parallel Distrib. Syst. 6(5): 531-535 (1995) |
| 23 | | Marcelo M. de Azevedo,
Nader Bagherzadeh,
Shahram Latifi:
Broadcasting Algorithms for the Star-Connected Cycles Interconnection Network.
J. Parallel Distrib. Comput. 25(2): 209-222 (1995) |
| 1994 |
|---|
| 22 | | Steven Wallace,
Nader Bagherzadeh:
Performance Issues of a Superscalar Microprocessor.
ICPP (1) 1994: 293-297 |
| 21 | EE | Shahram Latifi,
Nader Bagherzadeh:
Incomplete Star: An Incrementally Scalable Network Based on the Star Graph.
IEEE Trans. Parallel Distrib. Syst. 5(1): 97-102 (1994) |
| 20 | EE | Arthur Abnous,
Nader Bagherzadeh:
Pipelining and Bypassing in a VLIW Processor.
IEEE Trans. Parallel Distrib. Syst. 5(6): 658-664 (1994) |
| 19 | | Alireza Kavianpour,
Nader Bagherzadeh:
Parallel Algorithms for Line Detection on A Pyramid Architecture.
IJPRAI 8(1): 337-349 (1994) |
| 18 | EE | S. Shoari,
Alireza Kavianpour,
Nader Bagherzadeh:
Pyramid simulation of image processing applications.
Image Vision Comput. 12(8): 523-529 (1994) |
| 17 | | Alireza Kavianpour,
S. Shoari,
Nader Bagherzadeh:
A New Approach for Circle Detection on Multiprocessors.
J. Parallel Distrib. Comput. 20(2): 256-260 (1994) |
| 1993 |
|---|
| 16 | | Shahram Latifi,
Marcelo M. de Azevedo,
Nader Bagherzadeh:
The Star Connected Cycles: A Fixed-Degree Network for Parallel Processing.
ICPP 1993: 91-95 |
| 15 | | John Lenell,
Nader Bagherzadeh:
A Performance Comparison of Several Superscalar Processor Models with a VLIW Processor.
IPPS 1993: 44-48 |
| 14 | | Shahram Latifi,
Nader Bagherzadeh:
The Clustered-Star Graph: A New Topology for Large Interconnection Networks.
IPPS 1993: 514-518 |
| 13 | | Nader Bagherzadeh,
Nayla Nassif,
Shahram Latifi:
A Routing and Broadcasting Scheme on Faulty Star Graphs.
IEEE Trans. Computers 42(11): 1398-1403 (1993) |
| 12 | | Alireza Kavianpour,
Nader Bagherzadeh:
A Systematic Approch for Mapping Application Tasks in Hypercubes.
IEEE Trans. Computers 42(6): 742-746 (1993) |
| 1992 |
|---|
| 11 | | Shahram Latifi,
Si-Qing Zheng,
Nader Bagherzadeh:
Optimal Ring Embedding in Hypercubes with Faulty Links.
FTCS 1992: 178-184 |
| 10 | | Takaaki Kato,
Koji Suginuma,
Nader Bagherzadeh:
On Design and Performance Analysis of a Superscalar Architecture.
ICPP (1) 1992: 171-178 |
| 9 | | Nader Bagherzadeh,
Kent Hawk:
Parallel Implementation of the Auction Algorithm on the Intel Hypercube.
IPPS 1992: 443-447 |
| 8 | EE | Takaaki Kato,
Toshihisa Ono,
Nader Bagherzadeh:
Performance analysis and design methodology for a scalable superscalar architecture.
MICRO 1992: 246-255 |
| 7 | EE | Alireza Kavianpour,
Nader Bagherzadeh:
Finding circular shapes in an image on a pyramid architecture.
Pattern Recognition Letters 13(12): 843-848 (1992) |
| 1991 |
|---|
| 6 | | Arthur Abnous,
Roni Potasman,
Nader Bagherzadeh,
Alexandru Nicolau:
A Percolation Based VLIW Architecture.
ICPP (1) 1991: 144-148 |
| 5 | | Alireza Kavianpour,
Nader Bagherzadeh:
Parallel Hough Transform for Image Processing on a Pyramid Architecture.
ICPP (1) 1991: 395-398 |
| 4 | | Wei-Kang Tsai,
Nader Bagherzadeh,
Young C. Kim:
Hypermesh: A Combined Quad Tree and Mesh Network for Parallel Processing.
ICPP (1) 1991: 696-697 |
| 3 | | Arthur Abnous,
Nader Bagherzadeh:
Special Features of a VLIW Architecture.
IPPS 1991: 224-227 |
| 2 | EE | Nader Bagherzadeh,
Seng-lai Heng,
Chuan-lin Wu:
A Parallel Asynchronous Garbage Collection Algorithm for Distributed Systems.
IEEE Trans. Knowl. Data Eng. 3(1): 100-107 (1991) |
| 1985 |
|---|
| 1 | | Manjai Lee,
Eric Fiene,
Chuan-lin Wu,
Geoffrey Brown,
Nader Bagherzadeh:
Network Facility for a Reconfigurable Computer Architecture.
ICDCS 1985: 264-271 |
