Cheong-fat Chan

2007
38	EE	Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. VLSI Signal Processing 47(3): 223-232 (2007)
2006
37	EE	Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. APCCAS 2006: 195-198
36	EE	Wang-Chi Cheng, Cheong-fat Chan, Suyi Tao, King-Keung Mok: 0.7 V Monolithic CMOS LNA for 802.11 A/B WLAN Application. APCCAS 2006: 25-28
35	EE	King-Keung Mok, Ka-Hung Tsang, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: Adiabatic Smart Card. APCCAS 2006: 287-290
34	EE	Wang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: 0.8 V GPS band CMOS VCO with 29% Tuning Range. APCCAS 2006: 522-525
33	EE	Xiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A 0.5V fully differential OTA with local common feedback. ISCAS 2006
32	EE	Chi-Hong Chan, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. ISCAS 2006
31	EE	Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. ISCAS 2006
30	EE	Wei Han, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: An efficient MFCC extraction method in speech recognition. ISCAS 2006
29	EE	Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. ISCAS 2006
28	EE	Ke Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. ISCAS 2006
2005
27	EE	Pui-Tak So, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Ramp voltage supply using adiabatic charging principle. ISCAS (3) 2005: 2152-2155
26	EE	Nang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: Active RC filter with reduced capacitance by current division technique. ISCAS (4) 2005: 3279-3282
25	EE	Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-fat Chan, Kong-Pang Pun: Realization of card-centric framework: a card-centric computer [smart cards]. ISCAS (5) 2005: 4999-5002
24	EE	Wei Han, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A speech recognizer with selectable model parameters. ISCAS (6) 2005: 5842-5845
2004
23	EE	Chun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous Java processor for contactless smart card. ASP-DAC 2004: 553-554
22		Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Card-Centric Framework - Providing I/O Resources for Smart Cards. CARDIS 2004: 225-240
21	EE	Wang Tung Cheng, Kong-Pang Pun, Cheong-fat Chan, Chiu-sing Choy: An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. ISCAS (1) 2004: 1140-1143
20		Wing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An asynchronous SOVA decoder for wireless communication application. ISCAS (2) 2004: 517-520
19	EE	Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Pipelines in Dynamic Dual-Rail Circuits. PATMOS 2004: 701-710
18	EE	Jing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A high-efficiency strongly self-checking asynchronous datapath. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1484-1494 (2004)
17	EE	Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: High Speed Curve Interpolating D/A Converter. VLSI Signal Processing 38(1): 5-11 (2004)
2003
16	EE	W. K. Yeung, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). ISCAS (2) 2003: 185-187
15	EE	Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching: An HMM-based speech recognition IC. ISCAS (2) 2003: 744-747
14	EE	Pak-Keung Leung, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous GF(2/sup 173/) ALU for elliptic curve crypto-processor. ISCAS (5) 2003: 337-340
13	EE	Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Design for Self-Checking and Self-Timed Datapath. VTS 2003: 417-430
2002
12	EE	Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 900 MHz 1.2 V CMOS mixer with high linearity. APCCAS (1) 2002: 1-4
11	EE	Jing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium 2002: 27-32
10	EE	Kin-Pui Ho, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A CMOS current feedback operational amplifier with active current mode compensation. ISCAS (1) 2002: 709-712
9	EE	Hongwei Wang, Cheong-fat Chan, Chiu-sing Choy: A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. ISCAS (3) 2002: 137-140
8	EE	Kong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca: A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. ISCAS (4) 2002: 221-224
7	EE	Wang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 1.2 V 900 MHz CMOS mixer. ISCAS (5) 2002: 365-368
2001
6	EE	Pui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A low power asynchronous DES. ISCAS (4) 2001: 538-541
5	EE	Lai-Kan Leung, Cheong-fat Chan, Oliver Chiu-sing Choy: A giga-hertz CMOS digital controlled oscillator. ISCAS (4) 2001: 610-613
4	EE	Chi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A pipelined dataflow small micro-coded asynchronous processor and its application to DCT. ISCAS (4) 2001: 910-913
3	EE	Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-fat Chan: A New Control Circuit for Asynchronous Micropipelines. IEEE Trans. Computers 50(9): 992-997 (2001)
1999
2		Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-ling Yang, Tin-yan Tang: Pipelined Dataflow Architecture of a Small Processor. PDPTA 1999: 1217-1223
1998
1	EE	Oliver Chiu-sing Choy, Tin-chak Pang, Juraj Povazanec, Cheong-fat Chan: A Useful Micropipeline Architecture to Implement DSP Algorithms. EUROMICRO 1998: 10212-

Coauthor Index

1	Jan Butas	[2] [3] [4] [6]
2	Chi-Hong Chan	[32]
3	Pak-Kee Chan	[22] [25]
4	Wing-Kin Chan	[20]
5	Wang Tung Cheng	[21]
6	Wang-Chi Cheng	[7] [12] [34] [36] [37]
7	Pak-Chung Ching	[15]
8	Oliver Chiu-sing Choy (Chiu-sing Choy)	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [37] [38]
9	José E. Franca	[8]
10	Wei Han	[15] [24] [30] [38]
11	Xiao-Yong He	[33]
12	Kin-Pui Ho	[10]
13	Kwok-Wai Hon	[15] [38]
14	Chi-Wai Lee	[4]
15	Tan Lee	[15]
16	Lai-Kan Leung	[5]
17	Pak-Keung Leung	[14] [29]
18	Hao Min	[23]
19	King-Keung Mok	[35] [36]
20	Tin-chak Pang	[1]
21	Juraj Povazanec	[1] [2] [3]
22	Kong-Pang Pun	[7] [8] [10] [12] [14] [15] [16] [20] [21] [22] [23] [24] [25] [26] [27] [29] [30] [31] [32] [33] [34] [35] [37] [38]
23	Kong-Pong Pun	[11] [13] [18] [19] [28]
24	Chi-Leung San	[25]
25	Pui-Lam Siu	[6]
26	Pui-Tak So	[27]
27	Siu-Kei Tang	[31]
28	Tin-yan Tang	[2]
29	Suyi Tao	[36]
30	Ka-Hung Tsang	[35]
31	Hongwei Wang	[9] [17]
32	Ke Xu	[28]
33	Jing-ling Yang	[2] [11] [13] [18] [19]
34	Nang-Ching Yeung	[26]
35	W. K. Yeung	[16]
36	Chun-Pong Yu	[23]
37	Yeu-qiu Zhang	[2]