Kunihiro Asada

2009
46	EE	MyeongGyu Jeong, Toru Nakura, Makoto Ikeda, Kunihiro Asada: Moebius circuit: dual-rail dynamic logic for logic gate level pipeline with error gate search feature. ACM Great Lakes Symposium on VLSI 2009: 177-180
2007
45	EE	Taisuke Kazama, Toru Nakura, Makoto Ikeda, Kunihiro Asada: Design of Active Substrate Noise Canceller using Power Supply di/dt Detector. ASP-DAC 2007: 100-101
44		Zhicheng Liang, Makoto Ikeda, Kunihiro Asada: Analysis of Noise Margins Due to Device Parameter Variations in Sub-100nm CMOS Technology. DDECS 2007: 81-86
43	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: OPC-Friendly De-Compaction with Timing Constraints for Standard Cell Layouts. ISQED 2007: 776-781
42	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: Timing-Aware Cell Layout De-Compaction for Yield Optimization by Critical Area Minimization. IEEE Trans. VLSI Syst. 15(6): 716-720 (2007)
2006
41	EE	Mohamed Abbas, Makoto Ikeda, Kunihiro Asada: On-chip 8GHz non-periodic high-swing noise detector. DATE 2006: 670-671
40	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: Timing-driven cell layout de-compaction for yield optimization by critical area minimization. DATE 2006: 884-889
39		Mohamed Abbas, Makoto Ikeda, Kunihiro Asada: Statistical Model for Logic Errors in CMOS Digital Circuits for Reliability-Driven Design Flow. DDECS 2006: 147-148
38	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: Exact minimum-width multi-row transistor placement for dual and non-dual CMOS cells. ISCAS 2006
37	EE	Hiroaki Yoshida, Makoto Ikeda, Kunihiro Asada: A Structural Approach for Transistor Circuit Synthesis. IEICE Transactions 89-A(12): 3529-3537 (2006)
36	EE	Taisuke Kazama, Makoto Ikeda, Kunihiro Asada: LSI Design Flow for Shot Reduction of Character Projection Electron Beam Direct Writing Using Combined Cell Stencil. IEICE Transactions 89-A(12): 3546-3550 (2006)
35	EE	Toru Nakura, Makoto Ikeda, Kunihiro Asada: Autonomous di/dt Control of Power Supply for Margin Aware Operation. IEICE Transactions 89-C(11): 1689-1694 (2006)
34	EE	Toru Nakura, Makoto Ikeda, Kunihiro Asada: Feedforward Active Substrate Noise Cancelling Based on di/dt of Power Supply. IEICE Transactions 89-C(3): 364-369 (2006)
33	EE	Mohamed Abbas, Makoto Ikeda, Kunihiro Asada: On-Chip Detector for Single-Event Noise Sensing with Voltage Scaling Function. IEICE Transactions 89-C(3): 370-376 (2006)
32	EE	Mohamed Abbas, Makoto Ikeda, Kunihiro Asada: Noise Immunity Investigation of Low Power Design Schemes. IEICE Transactions 89-C(8): 1238-1247 (2006)
2005
31	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: Exact minimum-width transistor placement without dual constraint for CMOS cells. ACM Great Lakes Symposium on VLSI 2005: 74-77
30	EE	Yusuke Yachide, Yusuke Oike, Makoto Ikeda, Kunihiro Asada: Real-time 3-D measurement system based on light-section method using smart image sensor. ICIP (3) 2005: 1008-1111
29	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: Exact Minimum-Width Transistor Placement for Dual and Non-dual CMOS Cells. IEICE Transactions 88-A(12): 3485-3491 (2005)
28	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: Yield-Optimal Layout Synthesis of CMOS Logic Cells by Wiring Fault Minimization. IEICE Transactions 88-A(7): 1957-1963 (2005)
27	EE	Toru Nakura, Makoto Ikeda, Kunihiro Asada: Stub vs. Capacitor for Power Supply Noise Reduction. IEICE Transactions 88-C(1): 125-132 (2005)
26	EE	Toru Nakura, Makoto Ikeda, Kunihiro Asada: On-chip di/dt Detector Circuit. IEICE Transactions 88-C(5): 782-787 (2005)
25	EE	Toru Nakura, Makoto Ikeda, Kunihiro Asada: Preliminary Experiments for Power Supply Noise Reduction Using On-Board Stubs. IEICE Transactions 88-C(8): 1734-1739 (2005)
24	EE	Ulkuhan Ekinciel, Hiroaki Yamaoka, Hiroaki Yoshida, Makoto Ikeda, Kunihiro Asada: A Performance Driven Module Generator for a Dual-Rail PLA with Embedded 2-Input Logic Cells. IEICE Transactions 88-D(6): 1159-1167 (2005)
2004
23	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: High speed layout synthesis for minimum-width CMOS logic cells via Boolean satisfiability. ASP-DAC 2004: 149-154
22	EE	Yusuke Oike, Makoto Ikeda, Kunihiro Asada: Design of real-time VGA 3-D image sensor using mixed-signal techniques. ASP-DAC 2004: 523-524
21	EE	Mohamed Abbas, Makoto Ikeda, Kunihiro Asada: Noise Effects on Performance of Low Power Design Schemes in Deep Submicron Regime. DFT 2004: 87-95
20	EE	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada: Exact Wiring Fault Minimization via Comprehensive Layout Synthesis for CMOS Logic Cells. ISQED 2004: 377-380
2003
19	EE	Yusuke Oike, Makoto Ikeda, Kunihiro Asada: High-speed position detector using new row-parallel architecture for fast collision prevention system. ISCAS (4) 2003: 788-791
18	EE	Tohru Ishihara, Satoshi Komatsu, Makoto Ikeda, Masahiro Fujita, Kunihiro Asada: Comparative Study On Verilog-Based And C-Based Hardware Design Education. MSE 2003: 41-42
2002
17	EE	Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Kunihiro Asada: Logic Synthesis for AND-XOR-OR Type Sense-Amplifying PLA. VLSI Design 2002: 166-171
16	EE	Tohru Ishihara, Kunihiro Asada: An Architectural Level Energy Reduction Technique For Deep-Submicron Cache Memories. VLSI Design 2002: 282-287
2001
15	EE	Tomohiro Nezuka, Masashi Hoshino, Makoto Ikeda, Kunihiro Asada: A smart position sensor for 3-D measurement. ASP-DAC 2001: 21-22
14	EE	Jian Qiao, Makoto Ikeda, Kunihiro Asada: Finding an optimal functional decomposition for LUT-based FPGA synthesis. ASP-DAC 2001: 225-230
13	EE	Hiroaki Yamaoka, Makoto Ikeda, Kunihiro Asada: A high-speed PLA using array logic circuits with latch sense amplifiers and a charge sharing scheme. ASP-DAC 2001: 3-4
12	EE	Tohru Ishihara, Kunihiro Asada: A system level memory power optimization technique using multiple supply and threshold voltages. ASP-DAC 2001: 456-461
11	EE	Yusuke Nakashima, Makoto Ikeda, Kunihiro Asada: Computational Cost Reduction in Extracting Inductance. ISQED 2001: 179-184
2000
10	EE	Tomohiro Nezuka, Takafumi Fujita, Makoto Ikeda, Kunihiro Asada: A binary image sensor with flexible motion vector detection using block matching method. ASP-DAC 2000: 21-22
9	EE	Jian Qiao, Makoto Ikeda, Kunihiro Asada: Optimum Functional Decomposition for LUT-Based FPGA Synthesis. FPL 2000: 555-564
8	EE	Makoto Ikeda, Hideyuki Aoki, Kunihiro Asada: DVDT: Design for Voltage Drop Test Using Onchip-Voltage Scan Path. ISQED 2000: 305-308
1999
7	EE	Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada: Low Power Chip Interface Based on Bus Data Encoding with Adaptive Code-Book Method. Great Lakes Symposium on VLSI 1999: 368-371
6	EE	Makoto Ikeda, Kunihiro Asada: Standard design flows of Logic LSIs in Japanese universities and VDEC. MSE 1999: 8-9
1998
5		Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada: Low Power Micoprocessors for Comparative Study on Bus Architecture and Multiplexer Architecture. ASP-DAC 1998: 323-324
4		Tetsuhisa Mido, Kunihiro Asada: An Analysis on VLSI Interconnection Considering Skin Effect. ASP-DAC 1998: 403-408
1995
3		Minkyu Song, Kunihiro Asada: Design Methodology for Low Power Data Compressors Based on a Window Detector in a 54X54 Bit Multiplier. ISCAS 1995: 1568-1571
1994
2		Makoto Ikeda, Kunihiro Asada: A Reduced-swing Data Transmission Scheme for Resistive Bus Lines in VSLIs. EDAC-ETC-EUROASIC 1994: 546-550
1992
1		H. Zhang, Kunihiro Asada: A general and efficient mask pattern generator for non-series-parallel CMOS transistor network. Synthesis for Control Dominated Circuits 1992: 323-333

Coauthor Index

1	Mohamed Abbas	[21] [32] [33] [39] [41]
2	Hideyuki Aoki	[8]
3	Ulkuhan Ekinciel	[24]
4	Masahiro Fujita	[18]
5	Takafumi Fujita	[10]
6	Masashi Hoshino	[15]
7	Tetsuya Iizuka	[20] [23] [28] [29] [31] [38] [40] [42] [43]
8	Makoto Ikeda	[2] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46]
9	Tohru Ishihara	[12] [16] [18]
10	MyeongGyu Jeong	[46]
11	Taisuke Kazama	[36] [45]
12	Satoshi Komatsu	[5] [7] [18]
13	Zhicheng Liang	[44]
14	Tetsuhisa Mido	[4]
15	Yusuke Nakashima	[11]
16	Toru Nakura	[25] [26] [27] [34] [35] [45] [46]
17	Tomohiro Nezuka	[10] [15]
18	Yusuke Oike	[19] [22] [30]
19	Jian Qiao	[9] [14]
20	Minkyu Song	[3]
21	Yusuke Yachide	[30]
22	Hiroaki Yamaoka	[13] [17] [24]
23	Hiroaki Yoshida	[17] [24] [37]
24	H. Zhang	[1]

Colors in the list of coauthors