Hans Jürgen Mattausch

2008
29	EE	Tatsuya Ezaki, Dondee Navarro, Youichi Takeda, N. Sadachika, G. Suzuki, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, T. Iizuka, M. Taguchi, Shigetaka Kumashiro, S. Miyamoto: Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations. Mathematics and Computers in Simulation 79(4): 1096-1106 (2008)
2007
28	EE	Takeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine. ISCAS 2007: 525-528
27	EE	Md. Anwarul Abedin, Yuki Tanaka, Ali Ahmadi, Shogo Sakakibara, Tetsushi Koide, Hans Jürgen Mattausch: Realization of K-Nearest-Matches Search Capability in Fully-Parallel Associative Memories. IEICE Transactions 90-A(6): 1240-1243 (2007)
26	EE	Koh Johguchi, Hans Jürgen Mattausch, Tetsushi Koide, Tetsuo Hironaka: 4-Port Unified Data/Instruction Cache Design with Distributed Crossbar and Interleaved Cache-Line Words. IEICE Transactions 90-C(11): 2157-2160 (2007)
25	EE	Takeshi Kumaki, Yasuto Kuroda, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer. IEICE Transactions 90-D(1): 334-345 (2007)
24	EE	Takeshi Kumaki, Yutaka Kono, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch: Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory. IEICE Transactions 90-D(1): 346-354 (2007)
23	EE	Takeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor. IEICE Transactions 90-D(8): 1312-1315 (2007)
2006
22	EE	Koh Johguchi, Zhaomin Zhu, Hans Jürgen Mattausch, Tetsushi Koide, Tetsuo Hironaka, Kazuya Tanigawa: Unified Data/Instruction Cache with Hierarchical Multi-Port Architecture and Hidden Precharge Pipeline. APCCAS 2006: 1297-1300
21	EE	Md. Anwarul Abedin, Yuki Tanaka, Ali Ahmadi, Tetsushi Koide, Hans Jürgen Mattausch: Fully Parallel Associative Memory Architecture with Mixed Digital-Analog Match Circuit for Nearest Euclidean Distance Search. APCCAS 2006: 1309-1312
20	EE	Takeshi Kumaki, Y. Kouno, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch: Application of Multi-ported CAM for Parallel Coding. APCCAS 2006: 1859-1862
19	EE	Takashi Morimoto, Hidekazu Adachi, K. Yamaoka, K. Awane, Tetsushi Koide, Hans Jürgen Mattausch: An FPGA-Based Region-Growing Video Segmentation System with Boundary-Scan-Only LSI Architecture. APCCAS 2006: 944-947
18	EE	K. Yamaoka, Takashi Morimoto, Hidekazu Adachi, Tetsushi Koide, Hans Jürgen Mattausch: Image segmentation and pattern matching based FPGA/ASIC implementation architecture of real-time object tracking. ASP-DAC 2006: 176-181
17	EE	K. Yamaoka, Takashi Morimoto, Hidekazu Adachi, K. Awane, Tetsushi Koide, Hans Jürgen Mattausch: Multi-object tracking VLSI architecture using image-scan based region growing and feature matching. ISCAS 2006
16	EE	Hideyuki Noda, Katsumi Dosaka, Hans Jürgen Mattausch, Tetsushi Koide, Fukashi Morishita, Kazutami Arimoto: A Reliability-Enhanced TCAM Architecture with Associated Embedded DRAM and ECC. IEICE Transactions 89-C(11): 1612-1619 (2006)
15	EE	Takashi Morimoto, Hidekazu Adachi, Osamu Kiriyama, Tetsushi Koide, Hans Jürgen Mattausch: Boundary-Active-Only Adaptive Power-Reduction Scheme for Region-Growing Video-Segmentation. IEICE Transactions 89-D(3): 1299-1302 (2006)
2005
14	EE	Takashi Morimoto, Osamu Kiriyama, Hidekazu Adachi, Zhaomin Zhu, Tetsushi Koide, Hans Jürgen Mattausch: A low-power video segmentation LSI with boundary-active-only architecture. ASP-DAC 2005: 13-14
13	EE	Takashi Morimoto, Osamu Kiriyama, Yohmei Harada, Hidekazu Adachi, Tetsushi Koide, Hans Jürgen Mattausch: Object tracking in video pictures based on image segmentation and pattern matching. ISCAS (4) 2005: 3215-3218
12	EE	T. Saito, M. Maeda, Tetsuo Hironaka, Kazuya Tanigawa, Tetsuya Sueyoshi, K. Aoyama, Tetsushi Koide, Hans Jürgen Mattausch: Design of superscalar processor with multi-bank register file. ISCAS (4) 2005: 3507-3510
11	EE	Takeshi Kumaki, Yasuto Kuroda, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]. ISCAS (5) 2005: 5202-5205
10	EE	Shizunori Matsumoto, Hiroaki Ueno, Satoshi Hosokawa, Toshihiko Kitamura, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama: 1/f-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation. IEICE Transactions 88-C(2): 247-254 (2005)
9	EE	Hideyuki Noda, Kazunari Inoue, Hans Jürgen Mattausch, Tetsushi Koide, Katsumi Dosaka, Kazutami Arimoto, Kazuyasu Fujishima, Kenji Anami, Tsutomu Yoshihara: Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh. IEICE Transactions 88-C(4): 622-629 (2005)
8	EE	Dondee Navarro, Takeshi Mizoguchi, Masami Suetake, Kazuya Hisamitsu, Hiroaki Ueno, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama: A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential. IEICE Transactions 88-C(5): 1079-1086 (2005)
7	EE	Kazunari Inoue, Hideyuki Noda, Kazutami Arimoto, Hans Jürgen Mattausch, Tetsushi Koide: A CAM-Based Signature-Matching Co-processor with Application-Driven Power-Reduction Features. IEICE Transactions 88-C(6): 1332-1342 (2005)
6	EE	Takahiro Sasaki, Tomohiro Inoue, Nobuhiko Omori, Tetsuo Hironaka, Hans Jürgen Mattausch, Tetsushi Koide: Chip size and performance evaluations of shared cache for on-chip multiprocessor. Systems and Computers in Japan 36(9): 1-13 (2005)
2004
5	EE	Takashi Morimoto, Yohmei Harada, Tetsushi Koide, Hans Jürgen Mattausch: 350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node. ASP-DAC 2004: 531-532
4	EE	Yuji Yano, Tetsushi Koide, Hans Jürgen Mattausch: Associative memory with fully parallel nearest-Manhattan-distance search for low-power real-time single-chip applications. ASP-DAC 2004: 543-544
3	EE	Tetsuya Sueyoshi, Hiroshi Uchida, Hans Jürgen Mattausch, Tetsushi Koide, Yosuke Mitani, Tetsuo Hironaka: Compact 12-port multi-bank register file test-chip in 0.35µm CMOS for highly parallel processors. ASP-DAC 2004: 551-552
2001
2	EE	D. Miyawaki, Shizunori Matsumoto, Hans Jürgen Mattausch, S. Ooshiro, Masami Suetake, Michiko Miura-Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama: Correlation method of circuit-performance and technology fluctuations for improved design reliability. ASP-DAC 2001: 39-44
2000
1	EE	Masayasu Tanaka, N. Tokida, T. Okagaki, Michiko Miura-Mattausch, Walter Hansch, Hans Jürgen Mattausch: High performance of short-channel MOSFETs due to an elevated central-channel doping. ASP-DAC 2000: 365-370

Coauthor Index

1	Md. Anwarul Abedin	[21] [27]
2	Hidekazu Adachi	[13] [14] [15] [17] [18] [19]
3	Ali Ahmadi	[21] [27]
4	Kenji Anami	[9]
5	K. Aoyama	[12]
6	Kazutami Arimoto	[7] [9] [11] [16] [23] [25] [28]
7	K. Awane	[17] [19]
8	Katsumi Dosaka	[9] [11] [16] [23] [25] [28]
9	Tatsuya Ezaki	[29]
10	Kazuyasu Fujishima	[9]
11	Walter Hansch	[1]
12	Yohmei Harada	[5] [13]
13	Tetsuo Hironaka	[3] [6] [12] [22] [26]
14	Kazuya Hisamitsu	[8]
15	Satoshi Hosokawa	[10]
16	T. Iizuka	[29]
17	Kazunari Inoue	[7] [9]
18	Tomohiro Inoue	[6]
19	Masakatsu Ishizaki	[20] [23] [24] [25]
20	Koh Johguchi	[22] [26]
21	Osamu Kiriyama	[13] [14] [15]
22	Toshihiko Kitamura	[10]
23	Tetsushi Koide	[3] [4] [5] [6] [7] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28]
24	Yutaka Kono	[24]
25	Y. Kouno	[20]
26	Takeshi Kumaki	[11] [20] [23] [24] [25] [28]
27	Shigetaka Kumashiro	[2] [8] [10] [29]
28	Yasuto Kuroda	[11] [23] [25] [28]
29	M. Maeda	[12]
30	Shizunori Matsumoto	[2] [10]
31	Yosuke Mitani	[3]
32	Michiko Miura-Mattausch	[1] [2]
33	Mitiko Miura-Mattausch	[8] [10] [29]
34	S. Miyamoto	[29]
35	D. Miyawaki	[2]
36	Takeshi Mizoguchi	[8]
37	Takashi Morimoto	[5] [13] [14] [15] [17] [18] [19]
38	Fukashi Morishita	[16]
39	Noriaki Nakayama	[2] [8] [10]
40	Dondee Navarro	[8] [29]
41	Hideyuki Noda	[7] [9] [11] [16] [23] [25] [28]
42	Tatsuya Ohguro	[10] [29]
43	T. Okagaki	[1]
44	Nobuhiko Omori	[6]
45	S. Ooshiro	[2]
46	N. Sadachika	[29]
47	Kazunori Saito	[11] [23] [25] [28]
48	T. Saito	[12]
49	Shogo Sakakibara	[27]
50	Takahiro Sasaki	[6]
51	Masami Suetake	[2] [8]
52	Tetsuya Sueyoshi	[3] [12]
53	G. Suzuki	[29]
54	M. Taguchi	[29]
55	Youichi Takeda	[29]
56	Masayasu Tanaka	[1]
57	Yuki Tanaka	[21] [27]
58	Kazuya Tanigawa	[12] [22]
59	N. Tokida	[1]
60	Hiroshi Uchida	[3]
61	Hiroaki Ueno	[8] [10]
62	Tetsuya Yamaguchi	[2] [8] [10]
63	K. Yamaoka	[17] [18] [19]
64	Kyoji Yamashita	[2] [8] [10]
65	Yuji Yano	[4]
66	Tsutomu Yoshihara	[9]
67	Zhaomin Zhu	[14] [22]

Colors in the list of coauthors