2007 |
9 | EE | Guoyong Shi,
Weiwei Chen,
C.-J. Richard Shi:
A Graph Reduction Approach to Symbolic Circuit Analysis.
ASP-DAC 2007: 197-202 |
2006 |
8 | EE | Weiwei Chen,
Guoyong Shi:
Implementation of a Symbolic Circuit Simulator for Topological Network Analysis.
APCCAS 2006: 1368-1372 |
7 | EE | Guoyong Shi,
Bo Hu,
C.-J. Richard Shi:
On symbolic model order reduction.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1257-1272 (2006) |
6 | EE | C.-J. Richard Shi,
Michael W. Tian,
Guoyong Shi:
Efficient DC fault simulation of nonlinear analog circuits: one-step relaxation and adaptive simulation continuation.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1392-1400 (2006) |
2004 |
5 | EE | Guoyong Shi,
C.-J. Richard Shi:
Parametric reduced order modeling for interconnect analysis.
ASP-DAC 2004: 774-779 |
4 | EE | Anton A. Stoorvogel,
Ali Saberi,
Guoyong Shi:
Properties of recoverable region and semi-global stabilization in recoverable region for linear systems subject to constraints.
Automatica 40(9): 1481-1494 (2004) |
2000 |
3 | EE | Guoyong Shi:
Optimal bidirectional associative memories.
Int. J. System Science 31(6): 751-757 (2000) |
1997 |
2 | EE | Guoyong Shi:
A genetic algorithm applied to a classic job-shop scheduling problem.
Int. J. Systems Science 28(1): 25-32 (1997) |
1 | EE | Guoyong Shi:
Genetic approach to the design of bidirectional associative memory.
Int. J. Systems Science 28(2): 133-140 (1997) |