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2009 | ||
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118 | EE | Partha Bhowmick, Bhargab B. Bhattacharya: Removal of digitization errors in fingerprint ridgelines using B-splines. Pattern Recognition 42(3): 465-474 (2009) |

2008 | ||

117 | EE | Arindam Biswas, Suman Khara, Partha Bhowmick, Bhargab B. Bhattacharya: Extraction of regions of interest from face images using cellular analysis. Bangalore Compute Conf. 2008: 15 |

116 | Subhas C. Nandy, Krishnendu Mukhopadhyaya, Bhargab B. Bhattacharya: Recognition of Largest Empty Orthoconvex Polygon in a Point Set. CCCG 2008 | |

115 | EE | Arindam Biswas, Partha Bhowmick, Moumita Sarkar, Bhargab B. Bhattacharya: Finding the Orthogonal Hull of a Digital Object: A Combinatorial Approach. IWCIA 2008: 124-135 |

114 | EE | Hafizur Rahaman, Dipak K. Kole, Debesh Kumar Das, Bhargab B. Bhattacharya: On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set. VLSI Design 2008: 163-168 |

113 | EE | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Archival image indexing with connectivity features using randomized masks. Appl. Soft Comput. 8(4): 1625-1636 (2008) |

112 | EE | Partha Bhowmick, Bhargab B. Bhattacharya: Number-theoretic interpretation and construction of a digital circle. Discrete Applied Mathematics 156(12): 2381-2399 (2008) |

111 | EE | Suman K. Mitra, Malay Kumar Kundu, C. A. Murthy, Bhargab B. Bhattacharya, Tinku Acharya: A New Probabilistic Approach for Fractal Based Image Compression. Fundam. Inform. 87(3-4): 417-433 (2008) |

110 | EE | Indranil Saha, Bhargab B. Bhattacharya, Sheng Zhang, Sharad C. Seth: Planar Straight-Line Embedding of Double-Tree Scan Architecture on a Rectangular Grid. Fundam. Inform. 89(2-3): 331-344 (2008) |

109 | EE | Subhashis Majumder, Bhargab B. Bhattacharya: On the density and discrepancy of a 2D point set with applications to thermal analysis of VLSI chips. Inf. Process. Lett. 107(5): 177-182 (2008) |

2007 | ||

108 | EE | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: ICE: The Isothetic Convex Envelope of a Digital Object. ICCTA 2007: 219-223 |

107 | EE | Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhattacharya: A Local Search Heuristic for Biobjective Intersecting Geometric Graphs. ICCTA 2007: 224-230 |

106 | EE | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: Ranking of Optical Character Prototypes in a Large Database Using Isothetic Chord Lengths. ICCTA 2007: 422-426 |

105 | EE | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Characterization of Isothetic Polygons for Image Indexing and Retrieval. ICCTA 2007: 590-594 |

104 | EE | Subhashis Majumder, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Swarup Kumar Das: Hierarchical partitioning of VLSI floorplans by staircases. ACM Trans. Design Autom. Electr. Syst. 12(1): (2007) |

103 | EE | Sabyasachi Dey, Bhargab B. Bhattacharya, Malay K. Kundu, Arijit Bishnu, Tinku Acharya: A Co-processor for Computing the Euler Number of a Binary Image using Divide-and-Conquer Strategy. Fundam. Inform. 76(1-2): 75-89 (2007) |

102 | EE | Arijit Bishnu, Bhargab B. Bhattacharya: Stacked Euler Vector (SERVE): A Gray-Tone Image Feature Based on Bit-Plane Augmentation. IEEE Trans. Pattern Anal. Mach. Intell. 29(2): 350-355 (2007) |

101 | EE | Partha Bhowmick, Bhargab B. Bhattacharya: Fast Polygonal Approximation of Digital Curves Using Relaxed Straightness Properties. IEEE Trans. Pattern Anal. Mach. Intell. 29(9): 1590-1602 (2007) |

100 | EE | Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya: An Efficient Scan Tree Design for Compact Test Pattern Set. IEEE Trans. on CAD of Integrated Circuits and Systems 26(7): 1331-1339 (2007) |

2006 | ||

99 | EE | Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya: On finding the minimum test set of a BDD-based circuit. ACM Great Lakes Symposium on VLSI 2006: 169-172 |

98 | EE | Gopal Paul, S. N. Pradhan, Ajit Pal, Bhargab B. Bhattacharya: Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. APCCAS 2006: 1504-1507 |

97 | EE | Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhattacharya: Biobjective evolutionary and heuristic algorithms for intersection of geometric graphs. GECCO 2006: 1689-1696 |

96 | EE | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: PACE: Polygonal Approximation of Thick Digital Curves Using Cellular Envelope. ICVGIP 2006: 299-310 |

95 | EE | Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya: An Efficient Scan Tree Design for Compact Test Pattern Set. VLSI Design 2006: 175-180 |

94 | EE | Debasis Mitra, Subhasis Bhattacharjee, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sujit T. Zachariah, Sandip Kundu: Test Pattern Generation for Power Supply Droop Faults. VLSI Design 2006: 343-348 |

93 | EE | Anirban Lahiri, Saurabh Agarwal, Anupam Basu, Bhargab B. Bhattacharya: Recovery-Based Real-Time Static Scheduling for Battery Life Optimization. VLSI Design 2006: 469-472 |

92 | EE | Subhashis Majumder, Bhargab B. Bhattacharya: Solving Thermal Problems of Hot Chips Using Voronoi Diagrams. VLSI Design 2006: 545-548 |

91 | EE | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Implementing Symmetric Functions with Hierarchical Modules for Stuck-At and Path-Delay Fault Testability. J. Electronic Testing 22(2): 125-142 (2006) |

90 | EE | Arijit Bishnu, Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya: Simple algorithms for partial point set pattern matching under rigid motion. Pattern Recognition 39(9): 1662-1671 (2006) |

2005 | ||

89 | EE | Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya: Efficient Test Compaction for Pseudo-Random Testing. Asian Test Symposium 2005: 337-342 |

88 | EE | Debdeep Mukhopadhyay, Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya: CryptoScan: A Secured Scan Chain Architecture. Asian Test Symposium 2005: 348-353 |

87 | EE | Subhashis Majumder, Bhargab B. Bhattacharya: Density or Discrepancy: A VLSI Designer's Dilemma in Hot Spot Analysis. CCCG 2005: 167-170 |

86 | EE | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: MUSC: Multigrid Shape Codes and Their Applications to Image Retrieval. CIS (1) 2005: 1057-1063 |

85 | EE | Partha Bhowmick, Bhargab B. Bhattacharya: Approximation of Digital Circles by Regular Polygons. ICAPR (1) 2005: 257-267 |

84 | EE | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: Reconstruction of torn documents using contour maps. ICIP (3) 2005: 517-520 |

83 | EE | Partha Bhowmick, Arindam Biswas, Bhargab B. Bhattacharya: Isothetic Polygonal Approximations of a 2D Object on Generalized Grid. PReMI 2005: 407-412 |

82 | EE | Piyush K. Bhunre, C. A. Murthy, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu: A Hybrid Data and Space Partitioning Technique for Similarity Queries on Bounded Clusters. PReMI 2005: 544-550 |

81 | EE | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: TIPS: On Finding a Tight Isothetic Polygonal Shape Covering a 2D Object. SCIA 2005: 930-939 |

80 | EE | Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya: On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design. VLSI Design 2005: 491-496 |

79 | EE | Subhashis Majumder, Susmita Sur-Kolay, Subhas C. Nandy, Bhargab B. Bhattacharya, B. Chakraborty: Hot Spots and Zones in a Chip: A Geometrician's View. VLSI Design 2005: 691-696 |

78 | EE | Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Euler vector for search and retrieval of gray-tone images. IEEE Transactions on Systems, Man, and Cybernetics, Part B 35(4): 801-812 (2005) |

77 | EE | Partha Bhowmick, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Determination of Minutiae Scores for Fingerprint Image Applications. Int. J. Image Graphics 5(3): 537-572 (2005) |

76 | EE | Arijit Bishnu, Bhargab B. Bhattacharya, Malay K. Kundu, C. A. Murthy, Tinku Acharya: A pipeline architecture for computing the Euler number of a binary image. Journal of Systems Architecture 51(8): 470-487 (2005) |

2004 | ||

75 | EE | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faults. ASP-DAC 2004: 224-229 |

74 | EE | Partha Bhowmick, Bhargab B. Bhattacharya: Approximate Fingerprint Matching Using Kd-Tree. ICPR (1) 2004: 544-547 |

73 | Partha Bhowmick, Bhargab B. Bhattacharya: CODE: An Adaptive Algorithm for Detecting Corners and Directions of Incident Edges. ICVGIP 2004: 509-515 | |

72 | Arindam Biswas, Partha Bhowmick, Bhargab B. Bhattacharya: CONFERM: Connectivity Features with Randomized Masks and Their Applications to Image Indexing. ICVGIP 2004: 556-562 | |

71 | EE | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Easily Testable Realization of GRM and ESOP Networks for Detecting Stuck-at and Bridging Faults. VLSI Design 2004: 487-492 |

70 | EE | Susmita Sur-Kolay, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, Sujit T. Zachariah: Physical Design Trends and Layout-Based Fault Modeling. VLSI Design 2004: 6-8 |

69 | EE | Sandip Das, Susmita Sur-Kolay, Bhargab B. Bhattacharya: Manhattan-diagonal routing in channels and switchboxes. ACM Trans. Design Autom. Electr. Syst. 9(1): 75-104 (2004) |

68 | EE | Subhashis Majumder, Bhargab B. Bhattacharya, Vishwani D. Agrawal, Michael L. Bushnell: A New Classification of Path-Delay Fault Testability in Terms of Stuck-at Faults. J. Comput. Sci. Technol. 19(6): 955-964 (2004) |

67 | EE | Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya: On Finding A Staircase Channel With Minimum Crossing Nets In A VLSI Floorplan. Journal of Circuits, Systems, and Computers 13(5): 1019-1038 (2004) |

2003 | ||

66 | EE | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: Mapping Symmetric Functions to Hierarchical Modules for Path-Delay Fault Testability. Asian Test Symposium 2003: 284-289 |

65 | EE | Arijit Bishnu, Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya: An Improved Algorithm for Point Set Pattern Matching under Rigid Motion. CIAC 2003: 36-45 |

64 | EE | Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang: Double-Tree Scan: A Novel Low-Power Scan-Path Architecture. ITC 2003: 470-479 |

63 | EE | Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang: Low-Energy BIST Design for Scan-based Logic Circuits. VLSI Design 2003: 546-551 |

62 | EE | Subhas C. Nandy, Bhargab B. Bhattacharya: On finding an empty staircase polygon of largest area (width) in a planar point-set. Comput. Geom. 26(2): 143-171 (2003) |

61 | EE | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel: Zero-Aliasing Space Compaction of Test Responses Using a Single Periodic Output. IEEE Trans. Computers 52(12): 1646-1651 (2003) |

60 | EE | Nabanita Das, Bhargab B. Bhattacharya, Sergei L. Bezrukov: Permutation routing in optical MIN with minimum number of stages. Journal of Systems Architecture 48(11-12): 311-323 (2003) |

2002 | ||

59 | Arijit Bishnu, Swarup Bhunia, C. A. Murthy, Bhargab B. Bhattacharya, Malay Kumar Kundu, Tinku Acharya: Content based image retrieval: related issues using Euler vector. ICIP (2) 2002: 585-588 | |

58 | Arijit Bishnu, Partha Bhowmick, Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Combinatorial Classification of Pixels for Ridge Extraction in a Gray-Scale Fingerprint Image. ICVGIP 2002 | |

57 | Partha Bhowmick, Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Determination of Minutiae Scores for Fingerprint Image Applications. ICVGIP 2002 | |

56 | EE | Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: Euler Vector: A Combinatorial Signature for Gray-Tone Images. ITCC 2002: 121-127 |

55 | EE | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: A New Synthesis of Symmetric Functions. VLSI Design 2002: 160-165 |

54 | EE | Parthasarathi Dasgupta, Peichen Pan, Subhas C. Nandy, Bhargab B. Bhattacharya: Monotone bipartitioning problem in a planar point set with applications to VLSI. ACM Trans. Design Autom. Electr. Syst. 7(2): 231-248 (2002) |

53 | EE | Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu: A Simple Architecture for Computing Moments and Orientation of an Image. Fundam. Inform. 52(4): 285-295 (2002) |

52 | EE | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty: Synthesis of single-output space compactors for scan-based sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1171-1179 (2002) |

51 | EE | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: BIST Design for Detecting Multiple Stuck-Open Faults in CMOS Circuits Using Transition Count. J. Comput. Sci. Technol. 17(6): 731-737 (2002) |

2001 | ||

50 | EE | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty: Synthesis of single-output space compactors with application to scan-based IP cores. ASP-DAC 2001: 496-502 |

49 | EE | Arijit Bishnu, Bhargab B. Bhattacharya, Malay Kumar Kundu, C. A. Murthy, Tinku Acharya: On-chip computation of Euler number of a binary image for efficient database search. ICIP (3) 2001: 310-313 |

48 | EE | Subhashis Majumder, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Subhas C. Nandy: Area(number)-balanced hierarchy of staircase channels with minimum crossing nets. ISCAS (5) 2001: 395-398 |

47 | EE | Suman K. Mitra, C. A. Murthy, Malay Kumar Kundu, Bhargab B. Bhattacharya, Tinku Acharya: Fractal Image Compression Using Iterated Function System with Probabilities. ITCC 2001: 191-195 |

46 | EE | Debesh Kumar Das, Bhargab B. Bhattacharya, Satoshi Ohtake, Hideo Fujiwara: Testable Design of Sequential Circuits with Improved Fault Efficiency. VLSI Design 2001: 128-133 |

45 | EE | Koushik Sinha, Susmita Sur-Kolay, Bhargab B. Bhattacharya, P. S. Dasgupta: Partitioning Routing Area into Zones with Distinct Pins. VLSI Design 2001: 345- |

44 | EE | A. Morozov, Michael Gössel, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Design of Parameterizable Error-Propagating Space Compactors for Response Observation. VTS 2001: 48-53 |

43 | Parthasarathi Dasgupta, Anup K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya: Searching networks with unrestricted edge costs. IEEE Transactions on Systems, Man, and Cybernetics, Part A 31(6): 497-507 (2001) | |

2000 | ||

42 | EE | Swarup Bhunia, Subhashis Majumder, Ayan Sircar, Susmita Sur-Kolay, Bhargab B. Bhattacharya: Topological Routing Amidst Polygonal Obstacles. VLSI Design 2000: 274-279 |

41 | EE | Sabyasachi Dey, Bhargab B. Bhattacharya, Malay Kumar Kundu, Tinku Acharya: A Fast Algorithm for Computing the Euler Number of an Image and its VLSI Implementation. VLSI Design 2000: 330-335 |

40 | EE | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel: Zero-Aliasing Space Compression using a Single Periodic Output and its Application to Testing of Embedded Cores. VLSI Design 2000: 382-391 |

39 | EE | Debesh K. Das, Uttam K. Bhattacharya, Bhargab B. Bhattacharya: Isomorph-Redundancy in Sequential Circuits. IEEE Trans. Computers 49(9): 992-997 (2000) |

38 | EE | Susanta Chakrabarti, Sandip Das, Debesh Kumar Das, Bhargab B. Bhattacharya: Synthesis of symmetric functions for path-delay fault testability. IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 1076-1081 (2000) |

37 | Subhas C. Nandy, Bhargab B. Bhattacharya, Antonio Hernández-Barrera: Safety Zone Problem. J. Algorithms 37(2): 538-569 (2000) | |

1999 | ||

36 | EE | Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya: An Adaptive BIST to Detect Multiple Stuck-Open Faults in CMOS circuits. ASP-DAC 1999: 287- |

35 | EE | Subhashis Majumder, Bhargab B. Bhattacharya, Vishwani D. Agrawal, Michael L. Bushnell: A Complete Characterization of Path Delay Faults through Stuck-at Faults. VLSI Design 1999: 492-497 |

34 | EE | Susanta Chakraborty, Sandip Das, Debesh K. Das, Bhargab B. Bhattacharya: Synthesis of Symmetric Functions for Path-Delay Fault Testability. VLSI Design 1999: 512-517 |

33 | EE | Sandip Das, Subhas C. Nandy, Bhargab B. Bhattacharya: High Performance MCM Routing: A New Approach. VLSI Design 1999: 564-569 |

1998 | ||

32 | Debesh K. Das, Susanta Chakraborty, Bhargab B. Bhattacharya: Interchangeable Boolean Functions and Their Effects on Redundancy in Logic Circuits. ASP-DAC 1998: 469-474 | |

31 | EE | Debesh K. Das, Indrajit Chaudhuri, Bhargab B. Bhattacharya: Design of an Optimal Test Pattern Generator for Built-in Self Testing of Path Delay Faults. VLSI Design 1998: 205- |

30 | EE | Subhashis Majumder, Subhas C. Nandy, Bhargab B. Bhattacharya: Partitioning VLSI Floorplans by Staircase Channels for Global Routing. VLSI Design 1998: 59-64 |

29 | EE | Sandip Das, Susmita Sur-Kolay, Bhargab B. Bhattacharya: Routing of L-Shaped Channels, Switchboxes and Staircases in Manhattan-Diagonal Model. VLSI Design 1998: 65- |

28 | EE | Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya: A unified approach to topology generation and optimal sizing of floorplans. IEEE Trans. on CAD of Integrated Circuits and Systems 17(2): 126-135 (1998) |

1997 | ||

27 | EE | Debesh Kumar Das, Susanta Chakraborty, Bhargab B. Bhattacharya: New BIST Techniques for Universal and Robust Testing of CMOS Stuck-Open Faults. VLSI Design 1997: 303-309 |

1996 | ||

26 | Subhas C. Nandy, Krishnendu Mukhopadhyaya, Bhargab B. Bhattacharya: Shooter Location Problem. CCCG 1996: 93-98 | |

25 | EE | Debesh Kumar Das, Bhargab B. Bhattacharya: Does retiming affect redundancy in sequential circuits? VLSI Design 1996: 260-263 |

24 | EE | Parthasarathi Dasgupta, Anup K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya: Geometric bipartitioning problem and its applications to VLSI. VLSI Design 1996: 400-405 |

23 | EE | Sandip Das, Bhargab B. Bhattacharya: Channel routing in Manhattan-diagonal model. VLSI Design 1996: 43-48 |

22 | EE | Debesh K. Das, Uttam K. Bhattacharya, Bhargab B. Bhattacharya: Isomorph-redundancy in sequential circuits. VTS 1996: 463-469 |

1995 | ||

21 | EE | Debesh K. Das, Bhargab B. Bhattacharya: Testable design of non-scan sequential circuits using extra logic. Asian Test Symposium 1995: 176- |

20 | EE | Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya: A unified approach to topology generation and area optimization of general floorplans. ICCAD 1995: 712-715 |

19 | EE | P. S. Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya: VLSI floorplan generation and area optimization using AND-OR graph search. VLSI Design 1995: 370-375 |

1994 | ||

18 | Subhas C. Nandy, Arani Sinha, Bhargab B. Bhattacharya: Location of the Largest Empty Rectangle among Arbitrary Obstacles. FSTTCS 1994: 159-170 | |

17 | Nabanita Das, Bhargab B. Bhattacharya, Jayasree Dattagupta: Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks. IEEE Trans. Computers 43(12): 1439-1444 (1994) | |

1993 | ||

16 | Sandip Das, Bhargab B. Bhattacharya: Via Minimization in Channel Routing by Layout Modification. VLSI Design 1993: 109-110 | |

15 | Nabanita Das, Bhargab B. Bhattacharya, Jayasree Dattagupta: Isomorphism of Conflict Graphs in Multistage Interconnection Networks and Its Application to Optimal Routing. IEEE Trans. Computers 42(6): 665-677 (1993) | |

14 | EE | Susanta Chakraborty, Debesh Kumar Das, Bhargab B. Bhattacharya: Logical redundancies in irredundant combinational circuits. J. Electronic Testing 4(2): 125-130 (1993) |

1992 | ||

13 | EE | Susmita Sur-Kolay, Bhargab B. Bhattacharya: Canonical Embedding of Rectangular Duals with Applications to VLSI Floorplanning. DAC 1992: 69-74 |

1991 | ||

12 | Susmita Sur-Kolay, Bhargab B. Bhattacharya: The Cycle Structure of Channel Graphs in Nonslicible Floorplans and A Unified Algorithm for Feasible Routing Order. ICCD 1991: 524-527 | |

11 | Subir Bandyopadhyay, Bhargab B. Bhattacharya: On the Testable Design of Bilateral Bit-Level Systolic Arrays. ITC 1991: 1024-1033 | |

1990 | ||

10 | Subhas C. Nandy, Bhargab B. Bhattacharya, Sibabrata Ray: Efficient algorithms for Identifying All Maximal Isothetic Empty Rectangles in VLSI Layout Design. FSTTCS 1990: 255-269 | |

1989 | ||

9 | Bhargab B. Bhattacharya, Sharad C. Seth: Design of Parity Testable Combinational Circuits. IEEE Trans. Computers 38(11): 1580-1584 (1989) | |

8 | EE | Jitender S. Deogun, Bhargab B. Bhattacharya: Via minimization in VLSI routing with movable terminals. IEEE Trans. on CAD of Integrated Circuits and Systems 8(8): 917-920 (1989) |

1988 | ||

7 | Susmita Sur-Kolay, Bhargab B. Bhattacharya: Inherent Nonslicibility of Rectangular Duals in VLSI Floorplanning. FSTTCS 1988: 88-107 | |

1986 | ||

6 | Bhargab B. Bhattacharya, Bidyut Gupta: On the Impossible Class of Faulty Functions in Logic Networks Under Short Circuit Faults. IEEE Trans. Computers 35(1): 85-90 (1986) | |

5 | Bhabani P. Sinha, Bhargab B. Bhattacharya, Suranjan Ghose, Pradip K. Srimani: A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation. IEEE Trans. Computers 35(11): 1000-1004 (1986) | |

1985 | ||

4 | Bhabani P. Sinha, Bhargab B. Bhattacharya: On the Numerical Complexity of Short-Circuit Faults in Logic Networks. IEEE Trans. Computers 34(2): 186-190 (1985) | |

1984 | ||

3 | Bhargab B. Bhattacharya, Suranjan Ghose, Bhabani P. Sinha, Pradip K. Srimani: Heuristic Search Approach to Optimal Routing in a Distributed Architecture. FSTTCS 1984: 152-164 | |

2 | Bhargab B. Bhattacharya, Bidyut Gupta: Logical Modeling of Physical Failures and Their Inherent Syndrome Testability in MOS LSI/VLSI Networks. ITC 1984: 847-855 | |

1983 | ||

1 | Bhargab B. Bhattacharya, Bidyut Gupta: Syndrome Testable Design of Combinational Networks for Detecting Stuck-At and Bridging Faults. ITC 1983: 446-452 |