| 2006 |
|---|
| 4 | EE | Yoichi Yuyama,
Akira Tsuchiya,
Kazutoshi Kobayashi,
Hidetoshi Onodera:
Alternate Self-Shielding for High-Speed and Reliable On-Chip Global Interconnect.
IEICE Transactions 89-C(3): 327-333 (2006) |
| 2005 |
|---|
| 3 | EE | Kazutoshi Kobayashi,
Masao Aramoto,
Yoichi Yuyama,
Akihiko Higuchi,
Hidetoshi Onodera:
A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing.
ASP-DAC 2005: 619-622 |
| 2004 |
|---|
| 2 | EE | Yoichi Yuyama,
Masao Aramoto,
Kazutoshi Kobayashi,
Hidetoshi Onodera:
An SoC architecture and its design methodology using unifunctional heterogeneous processor array.
ASP-DAC 2004: 737-742 |
| 1 | | Yoichi Yuyama,
Masao Aramoto,
Kazutoshi Kobayashi,
Hidetoshi Onodera:
RTL/ISS co-modeling methodology for embedded processor using SystemC.
ISCAS (5) 2004: 305-308 |
