Rei-Fu Huang

2007
14	EE	Rei-Fu Huang, Chao-Hsun Chen, Cheng-Wen Wu: Economic Aspects of Memory Built-in Self-Repair. IEEE Design & Test of Computers 24(2): 164-172 (2007)
13	EE	Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: Raisin: Redundancy Analysis Algorithm Simulation. IEEE Design & Test of Computers 24(4): 386-396 (2007)
2005
12	EE	Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu: A built-in self-repair design for RAMs with 2-D redundancy. IEEE Trans. VLSI Syst. 13(6): 742-745 (2005)
2004
11	EE	Rei-Fu Huang, Yan-Ting Lai, Yung-Fa Chou, Cheng-Wen Wu: SRAM delay fault modeling and test algorithm development. ASP-DAC 2004: 104-109
10	EE	Chih-Tsun Huang, Jen-Chieh Yeh, Yuan-Yuan Shih, Rei-Fu Huang, Cheng-Wen Wu: On Test and Diagnostics of Flash Memories. Asian Test Symposium 2004: 260-265
9	EE	Rei-Fu Huang, Chin-Lung Su, Cheng-Wen Wu, Shen-Tien Lin, Kun-Lun Luo, Yeong-Jar Chang: Fail Pattern Identification for Memory Built-In Self-Repair. Asian Test Symposium 2004: 366-371
8	EE	Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu, Chien-Chung Hung, Ming-Jer Kao, Yeong-Jar Chang, Wen Ching Wu: MRAM Defect Analysis and Fault Modeli. ITC 2004: 124-133
7	EE	Li-Ming Denq, Rei-Fu Huang, Cheng-Wen Wu, Yeong-Jar Chang, Wen Ching Wu: A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories. MTDT 2004: 65-69
2003
6	EE	Rei-Fu Huang, Yung-Fa Chou, Cheng-Wen Wu: Defect Oriented Fault Analysis for SRAM. Asian Test Symposium 2003: 256-261
5	EE	Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu: A Processor-Based Built-In Self-Repair Design for Embedded Memories. Asian Test Symposium 2003: 366-371
4	EE	Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow: A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy. ITC 2003: 393-402
3	EE	Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu Li: A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories. MTDT 2003: 53-
2002
2	EE	Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories. IOLTW 2002: 262-
1	EE	Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories. MTDT 2002: 68-

Coauthor Index

1	Yeong-Jar Chang	[7] [8] [9]
2	Chao-Hsun Chen	[14]
3	Yung-Fa Chou	[6] [11]
4	Eugene Chow	[4]
5	Li-Ming Denq	[3] [7]
6	Archer Hsu	[4]
7	Chih-Tsun Huang	[10]
8	Chien-Chung Hung	[8]
9	Ming-Jer Kao	[8]
10	Yan-Ting Lai	[11]
11	Jin-Fu Li	[1] [2] [3] [4] [12] [13]
12	Shen-Tien Lin	[9]
13	Kun-Lun Luo	[9]
14	Yuan-Yuan Shih	[10]
15	Chin-Lung Su	[5] [8] [9]
16	Peir-Yuan Tsai	[4]
17	Cheng-Wen Wu	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
18	Wen Ching Wu	[7] [8]
19	Jen-Chieh Yeh	[1] [2] [4] [10] [12] [13]