2005 |
4 | EE | Alexander Smith,
Andreas G. Veneris,
Moayad Fahim Ali,
Anastasios Viglas:
Fault diagnosis and logic debugging using Boolean satisfiability.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1606-1621 (2005) |
2004 |
3 | EE | Alexander Smith,
Andreas G. Veneris,
Anastasios Viglas:
Design diagnosis using Boolean satisfiability.
ASP-DAC 2004: 218-223 |
2 | EE | Moayad Fahim Ali,
Andreas G. Veneris,
Alexander Smith,
Sean Safarpour,
Rolf Drechsler,
Magdy S. Abadir:
Debugging sequential circuits using Boolean satisfiability.
ICCAD 2004: 204-209 |
1 | EE | Moayad Fahim Ali,
Andreas G. Veneris,
Sean Safarpour,
Magdy S. Abadir,
Freescale Semiconductor,
Rolf Drechsler,
Alexander Smith:
Debugging Sequential Circuits Using Boolean Satisfiability.
MTV 2004: 44-49 |