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Alexander Smith

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2005
4EEAlexander Smith, Andreas G. Veneris, Moayad Fahim Ali, Anastasios Viglas: Fault diagnosis and logic debugging using Boolean satisfiability. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1606-1621 (2005)
2004
3EEAlexander Smith, Andreas G. Veneris, Anastasios Viglas: Design diagnosis using Boolean satisfiability. ASP-DAC 2004: 218-223
2EEMoayad Fahim Ali, Andreas G. Veneris, Alexander Smith, Sean Safarpour, Rolf Drechsler, Magdy S. Abadir: Debugging sequential circuits using Boolean satisfiability. ICCAD 2004: 204-209
1EEMoayad Fahim Ali, Andreas G. Veneris, Sean Safarpour, Magdy S. Abadir, Freescale Semiconductor, Rolf Drechsler, Alexander Smith: Debugging Sequential Circuits Using Boolean Satisfiability. MTV 2004: 44-49

Coauthor Index

1Magdy S. Abadir [1] [2]
2Moayad Fahim Ali [1] [2] [4]
3Rolf Drechsler [1] [2]
4Sean Safarpour [1] [2]
5Freescale Semiconductor [1]
6Andreas G. Veneris [1] [2] [3] [4]
7Anastasios Viglas [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)