2006 | ||
---|---|---|
2 | EE | Ko Yoshikawa, Shigeto Inui, Yasuhiko Hagihara, Yuichi Nakamura, Takeshi Yoshimura: Domino Logic Synthesis System and its Applications. Journal of Circuits, Systems, and Computers 15(2): 277-287 (2006) |
2004 | ||
1 | EE | Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura, Shigeto Inui, Takeshi Yoshimura: Timing optimization by replacing flip-flops to latches. ASP-DAC 2004: 186-191 |
1 | Yasuhiko Hagihara | [1] [2] |
2 | Keisuke Kanamaru | [1] |
3 | Yuichi Nakamura (Yuhichi Nakamura) | [1] [2] |
4 | Ko Yoshikawa | [1] [2] |
5 | Takeshi Yoshimura | [1] [2] |