2008 |
14 | EE | Peter Feldmann,
Soroush Abbaspour,
Debjit Sinha,
Gregory Schaeffer,
Revanta Banerji,
Hemlata Gupta:
Driver waveform computation for timing analysis with multiple voltage threshold driver models.
DAC 2008: 425-428 |
13 | EE | Peter Feldmann,
Soroush Abbaspour:
Towards a more physical approach to gate modeling for timing, noise, and power.
DAC 2008: 453-455 |
12 | EE | Debjit Sinha,
Gregory Schaeffer,
Soroush Abbaspour,
Alex Rubin,
Frank Borkam:
Constrained aggressor set selection for maximum coupling noise.
ICCAD 2008: 790-796 |
2007 |
11 | EE | Soroush Abbaspour,
Hanif Fatemi,
Massoud Pedram:
Parameterized Non-Gaussian Variational Gate Timing Analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1495-1508 (2007) |
2006 |
10 | EE | Hanif Fatemi,
Soroush Abbaspour,
Massoud Pedram,
Amir H. Ajami,
Emre Tuncer:
SACI: statistical static timing analysis of coupled interconnects.
ACM Great Lakes Symposium on VLSI 2006: 241-246 |
9 | EE | Soroush Abbaspour,
Hanif Fatemi,
Massoud Pedram:
Parameterized block-based non-gaussian statistical gate timing analysis.
ASP-DAC 2006: 947-952 |
8 | EE | Soroush Abbaspour,
Hanif Fatemi,
Massoud Pedram:
Non-gaussian statistical interconnect timing analysis.
DATE 2006: 533-538 |
7 | EE | Soroush Abbaspour,
Massoud Pedram,
Amir H. Ajami,
Chandramouli V. Kashyap:
Fast Interconnect and Gate Timing Analysis for Performance Optimization.
IEEE Trans. VLSI Syst. 14(12): 1383-1388 (2006) |
2005 |
6 | EE | Soroush Abbaspour,
Hanif Fatemi,
Massoud Pedram:
VITA: variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input.
ACM Great Lakes Symposium on VLSI 2005: 426-430 |
5 | EE | Soroush Abbaspour,
Hanif Fatemi,
Massoud Pedram:
VGTA: Variation Aware Gate Timing Analysis.
ICCD 2005: 351-356 |
2004 |
4 | EE | Soroush Abbaspour,
Amir H. Ajami,
Massoud Pedram,
Emre Tuncer:
TFA: a threshold-based filtering algorithm for propagation delay and slew calculation of high-speed VLSI interconnects.
ACM Great Lakes Symposium on VLSI 2004: 19-24 |
3 | EE | Soroush Abbaspour,
Massoud Pedram:
Gate delay calculation considering the crosstalk capacitances.
ASP-DAC 2004: 852-857 |
2003 |
2 | EE | Chang Woo Kang,
Soroush Abbaspour,
Massoud Pedram:
Buffer sizing for minimum energy-delay product by using an approximating polynomial.
ACM Great Lakes Symposium on VLSI 2003: 112-115 |
1 | EE | Soroush Abbaspour,
Massoud Pedram,
Payam Heydari:
Optimizing the Energy-Delay-Ringing Product in On-Chip CMOS Line Drivers.
ISQED 2003: 261-266 |