Chih-Tsun Huang

2008
35	EE	Ming-Chang Hsieh, Chih-Tsun Huang: An embedded infrastructure of debug and trace interface for the DSP platform. DAC 2008: 866-871
34	EE	Jyu-Yuan Lai, Chih-Tsun Huang: Elixir: High-Throughput Cost-Effective Dual-Field Processors and the Design Framework for Elliptic Curve Cryptography. IEEE Trans. VLSI Syst. 16(11): 1567-1580 (2008)
2007
33	EE	Shin-Yi Lin, Chih-Tsun Huang: A High-Throughput Low-Power AES Cipher for Network Applications. ASP-DAC 2007: 595-600
32	EE	Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang, Shih-Chieh Chang: Optimization of Pattern Matching Circuits for Regular Expression on FPGA. IEEE Trans. VLSI Syst. 15(12): 1303-1310 (2007)
2006
31	EE	Chen-Hsing Wang, Chih-Yen Lo, Min-Sheng Lee, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang: A network security processor design based on an integrated SOC design and test platform. DAC 2006: 490-495
30	EE	Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang, Shih-Chieh Chang: Optimization of regular expression pattern matching circuits on FPGA. DATE Designers' Forum 2006: 12-17
2005
29	EE	Chih-Pin Su, Chia-Lung Horng, Chih-Tsun Huang, Cheng-Wen Wu: A configurable AES processor for enhanced security. ASP-DAC 2005: 361-366
28	EE	Chih-Pin Su, Chen-Hsing Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu: Design and test of a scalable security processor. ASP-DAC 2005: 372-375
27	EE	Chun-Chieh Wang, Jing-Jia Liou, Yen-Lin Peng, Chih-Tsun Huang, Cheng-Wen Wu: A BIST Scheme for FPGA Interconnect Delay Faults. VTS 2005: 201-206
2004
26	EE	Mao-Yin Wang, Chih-Pin Su, Chih-Tsun Huang, Cheng-Wen Wu: An HMAC processor with integrated SHA-1 and MD5 algorithms. ASP-DAC 2004: 456-458
25	EE	Chih-Tsun Huang, Jen-Chieh Yeh, Yuan-Yuan Shih, Rei-Fu Huang, Cheng-Wen Wu: On Test and Diagnostics of Flash Memories. Asian Test Symposium 2004: 260-265
24	EE	Yu-Tsao Hsing, Chih-Wea Wang, Ching-Wei Wu, Chih-Tsun Huang, Cheng-Wen Wu: Failure Factor Based Yield Enhancement for SRAM Designs. DFT 2004: 20-28
23	EE	Yen-Lin Peng, Jing-Jia Liou, Chih-Tsun Huang, Cheng-Wen Wu: An Application-Independent Delay Testing Methodology for Island-Style FPGA. DFT 2004: 478-486
22	EE	Kuo-Liang Cheng, Jing-Reng Huang, Chih-Wea Wang, Chih-Yen Lo, Li-Ming Denq, Chih-Tsun Huang, Shin-Wei Hung, Jye-Yuan Lee: An SOC Test Integration Platform and Its Industrial Realization. ITC 2004: 1213-1222
2003
21	EE	Kuo-Liang Cheng, Chih-Wea Wang, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu: FAME: A Fault-Pattern Based Memory Failure Analysis Framework. ICCAD 2003: 595-598
20	EE	Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu, Frank Huang, Hong-Tzer Yang: Fault Pattern Oriented Defect Diagnosis for Memories. ITC 2003: 29-38
19	EE	Chih-Wea Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu: Test and Diagnosis of Word-Oriented Multiport Memories. VTS 2003: 248-253
18	EE	Chih-Tsun Huang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu: Built-in redundancy analysis for memory yield improvement. IEEE Transactions on Reliability 52(4): 386-399 (2003)
2002
17	EE	Chih-Wea Wang, Jing-Reng Huang, Yen-Fu Lin, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin: Test Scheduling of BISTed Memory Cores for SOC. Asian Test Symposium 2002: 356-
16	EE	Huan-Shan Hsu, Jing-Reng Huang, Kuo-Liang Cheng, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin: Test Scheduling and Test Access Architecture Optimization for System-on-Chip. Asian Test Symposium 2002: 411-
15	EE	Jen-Chieh Yeh, Chi-Feng Wu, Kuo-Liang Cheng, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu: Flash Memory Built-In Self-Test Using March-Like Algorithm. DELTA 2002: 137-141
14	EE	Sau-Kwo Chiu, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu: Diagonal Test and Diagnostic Schemes for Flash Memorie. ITC 2002: 37-46
13	EE	Kuo-Liang Cheng, Jen-Chieh Yeh, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu: RAMSES-FT: A Fault Simulator for Flash Memory Testing and Diagnostics. VTS 2002: 281-288
12	EE	Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu: Fault simulation and test algorithm generation for random accessmemories. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 480-490 (2002)
2001
11	EE	Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang, Shyh-Horng Lin, Hsin-Po Wang: A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters. Asian Test Symposium 2001: 103-
10	EE	Kuo-Liang Cheng, Chia-Ming Hsueh, Jing-Reng Huang, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu: Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip. Asian Test Symposium 2001: 91-96
9	EE	Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Chih-Wea Wang, Cheng-Wen Wu: Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories. DAC 2001: 301-306
8		Jin-Fu Li, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu: March-based RAM diagnosis algorithms for stuck-at and coupling faults. ITC 2001: 758-767
2000
7	EE	Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu: A programmable built-in self-test core for embedded memories. ASP-DAC 2000: 11-12
6	EE	Chuang Cheng, Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu, Chen-Jong Wey, Ming-Chang Tsai: BRAINS: A BIST Compiler for Embedded Memories. DFT 2000: 299-
5		Chi-Feng Wu, Chih-Tsun Huang, Chih-Wea Wang, Kuo-Liang Cheng, Cheng-Wen Wu: Error Catch and Analysis for Semiconductor Memories Using March Tests. ICCAD 2000: 468-471
4	EE	Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu: Simulation-Based Test Algorithm Generation for Random Access Memories. VTS 2000: 291-296
1999
3	EE	Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu: RAMSES: A Fast Memory Fault Simulator. DFT 1999: 165-173
2	EE	Chih-Tsun Huang, Jing-Reng Huang, Chi-Feng Wu, Cheng-Wen Wu, Tsin-Yuan Chang: A Programmable BIST Core for Embedded DRAM. IEEE Design & Test of Computers 16(1): 59-70 (1999)
1997
1	EE	Chih-Tsun Huang, Cheng-Wen Wu: High-speed C-testable systolic array design for Galois-field inversion. ED&TC 1997: 342-346

Coauthor Index

1	Shih-Chieh Chang	[30] [32]
2	Tsin-Yuan Chang	[2]
3	Chuang Cheng	[6]
4	Kuo-Liang Cheng	[4] [5] [8] [9] [10] [12] [13] [15] [16] [17] [19] [20] [21] [22] [28]
5	Sau-Kwo Chiu	[14]
6	Yung-Fa Chou	[15] [20] [21]
7	Li-Ming Denq	[22]
8	Chia-Lung Horng	[29]
9	Ming-Chang Hsieh	[35]
10	Yu-Tsao Hsing	[24]
11	Huan-Shan Hsu	[16]
12	Chia-Ming Hsueh	[10]
13	Frank Huang	[20]
14	Jing-Reng Huang	[2] [6] [7] [10] [16] [17] [22]
15	Rei-Fu Huang	[25]
16	Shi-Yu Huang	[11] [31]
17	Shin-Wei Hung	[22]
18	Chang-Ping Jiang	[30] [32]
19	Jyu-Yuan Lai	[34]
20	Jih-Nung Lee	[20] [21]
21	Jye-Yuan Lee	[22]
22	Min-Sheng Lee	[31]
23	Jin-Fu Li	[8] [18]
24	Cheng-Hung Lin	[30] [32]
25	Shin-Yi Lin	[33]
26	Shyh-Horng Lin	[11]
27	Yen-Fu Lin	[17]
28	Youn-Long Lin	[16] [17]
29	Jing-Jia Liou	[23] [27]
30	Chih-Yen Lo	[22] [31]
31	Yen-Lin Peng	[23] [27]
32	Yuan-Yuan Shih	[25]
33	Chih-Pin Su	[26] [28] [29]
34	Ming-Chang Tsai	[6]
35	Ruey-Shing Tzeng	[11]
36	Chen-Hsing Wang	[28] [31]
37	Chih-Wea Wang	[5] [9] [11] [13] [16] [17] [19] [20] [21] [22] [24]
38	Chun-Chieh Wang	[27]
39	Hsin-Po Wang	[11]
40	Mao-Yin Wang	[26]
41	Chen-Jong Wey	[6]
42	Cheng-Wen Wu	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [23] [24] [25] [26] [27] [28] [29] [31]
43	Chi-Feng Wu	[2] [3] [4] [5] [9] [11] [12] [15] [18]
44	Ching-Wei Wu	[24]
45	Hong-Tzer Yang	[20]
46	Jen-Chieh Yeh	[10] [13] [14] [15] [25] [31]

Colors in the list of coauthors