| 2006 |
|---|
| 23 | EE | Rochit Rajsuman:
Innovation In Test: Where Are We.
DELTA 2006: 289-294 |
| 22 | EE | Rochit Rajsuman:
Towards The Methodology of On-line Diagnosis.
IOLTS 2006: 76 |
| 2004 |
|---|
| 21 | EE | Kazumi Hatayama,
Rochit Rajsuman:
Opportunities with the open architecture test system.
ASP-DAC 2004: 334 |
| 20 | EE | Rochit Rajsuman:
New opportunities with the open architecture test system.
ASP-DAC 2004: 335 |
| 19 | EE | Rochit Rajsuman:
An Overview of the Open Architecture Test System.
DELTA 2004: 341-348 |
| 18 | EE | Rochit Rajsuman,
Masuda Noriyuki:
Open Architecture Test System: System Architecture and Design.
ITC 2004: 403-412 |
| 2002 |
|---|
| 17 | EE | Rochit Rajsuman:
Extending EDA Environment From Design to Test.
Asian Test Symposium 2002: 386-391 |
| 16 | EE | Rochit Rajsuman:
Can IC Test Learn from How a Tester is Tested.
ITC 2002: 1186 |
| 15 | EE | Rochit Rajsuman:
Testing The Tester.
ITC 2002: 27 |
| 14 | EE | Rochit Rajsuman:
Testing The Tester.
ITC 2002: 30 |
| 2001 |
|---|
| 13 | | Roderick McConnell,
Rochit Rajsuman,
Eric A. Nelson,
Jeffrey Dreibelbis:
Test and repair of large embedded DRAMs. I.
ITC 2001: 163-172 |
| 12 | EE | Rochit Rajsuman:
Design and Test of Large Embedded Memories: An Overview.
IEEE Design & Test of Computers 18(3): 16-27 (2001) |
| 11 | | Rochit Rajsuman,
Francky Catthoor:
Guest Editors' Intoduction: The New World of Large Embedded Memories.
IEEE Design & Test of Computers 18(3): 3-4 (2001) |
| 2000 |
|---|
| 10 | | Jerry Katz,
Rochit Rajsuman:
A new paradigm in test for the next millennium.
ITC 2000: 468-476 |
| 1999 |
|---|
| 9 | | Rochit Rajsuman:
Testing a system-on-a-chip with embedded microprocessor.
ITC 1999: 499-508 |
| 1996 |
|---|
| 8 | | Rochit Rajsuman:
Challenge of the 90's: Testing CoreWareTM Based ASICs.
ITC 1996: 940 |
| 1994 |
|---|
| 7 | | S. Hwang,
Rochit Rajsuman,
Scott Davidson:
IDDQ Detection of CMOS Bridging Faults by Stuck-At Fault Tests.
VLSI Design 1994: 183-186 |
| 6 | EE | Rochit Rajsuman:
A new testing method for EEPLA.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(7): 935-939 (1994) |
| 1993 |
|---|
| 5 | | Rochit Rajsuman,
D. A. Penry:
Coverage of Bridging Faults by Random Testing in IDDQ Test Environment.
VLSI Design 1993: 136-139 |
| 1990 |
|---|
| 4 | EE | S. Hwang,
Rochit Rajsuman,
Yashwant K. Malaiya:
On the testing of microprogrammed processor.
MICRO 1990: 260-266 |
| 1989 |
|---|
| 3 | EE | Rochit Rajsuman,
Anura P. Jayasumana,
Yashwant K. Malaiya:
CMOS Stuck-open Fault Detection Using Single Test Patterns.
DAC 1989: 714-717 |
| 2 | EE | Rochit Rajsuman,
Yashwant K. Malaiya,
Anura P. Jayasumana:
Limitations of switch level analysis for bridging faults.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(7): 807-811 (1989) |
| 1987 |
|---|
| 1 | EE | Rochit Rajsuman,
Yashwant K. Malaiya,
Anura P. Jayasumana:
On Accuracy of Switch-Level Modeling of Bridging Faults in Complex Gates.
DAC 1987: 244-250 |
