2008 |
13 | EE | Udo Krautz,
Markus Wedler,
Wolfgang Kunz,
Kai Weber,
Christian Jacobi,
Matthias Pflanz:
Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof.
ASP-DAC 2008: 398-403 |
12 | EE | Oliver Wienand,
Markus Wedler,
Dominik Stoffel,
Wolfgang Kunz,
Gert-Martin Greuel:
An Algebraic Approach for Proving Data Correctness in Arithmetic Data Paths.
CAV 2008: 473-486 |
11 | EE | Evgeny Pavlenko,
Markus Wedler,
Dominik Stoffel,
Wolfgang Kunz,
Oliver Wienand,
Evgeny Karibaev:
Modeling of Custom-Designed Arithmetic Components for ABL Normalization.
FDL 2008: 124-129 |
10 | EE | Sacha Loitz,
Markus Wedler,
Christian Brehm,
Timo Vogt,
Norbert Wehn,
Wolfgang Kunz:
Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking.
SASP 2008: 48-54 |
9 | EE | Minh D. Nguyen,
Max Thalmaier,
Markus Wedler,
J. Bormann,
Dominik Stoffel,
Wolfgang Kunz:
Unbounded Protocol Compliance Verification Using Interval Property Checking With Invariants.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2068-2082 (2008) |
2007 |
8 | EE | Markus Wedler,
Dominik Stoffel,
Raik Brinkmann,
Wolfgang Kunz:
A Normalization Method for Arithmetic Data-Path Verification.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 1909-1922 (2007) |
2005 |
7 | EE | Markus Wedler,
Dominik Stoffel,
Wolfgang Kunz:
Normalization at the arithmetic bit level.
DAC 2005: 457-462 |
6 | | Minh D. Nguyen,
Dominik Stoffel,
Markus Wedler,
Wolfgang Kunz:
Transition-by-transition FSM traversal for reachability analysis in bounded model checking.
ICCAD 2005: 1068-1075 |
2004 |
5 | EE | Markus Wedler,
Dominik Stoffel,
Wolfgang Kunz:
Exploiting state encoding for invariant generation in induction-based property checking.
ASP-DAC 2004: 424-429 |
4 | EE | Markus Wedler,
Dominik Stoffel,
Wolfgang Kunz:
Arithmetic Reasoning in DPLL-Based SAT Solving.
DATE 2004: 30-35 |
3 | EE | Dominik Stoffel,
Markus Wedler,
Peter Warkentin,
Wolfgang Kunz:
Structural FSM traversal.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 598-619 (2004) |
2003 |
2 | EE | Markus Wedler,
Dominik Stoffel,
Wolfgang Kunz:
Using RTL Statespace Information and State Encoding for Induction Based Property Checking.
DATE 2003: 11156-11157 |
2002 |
1 | EE | Markus Wedler,
Dominik Stoffel,
Wolfgang Kunz:
Improving Structural FSM Traversal by Constraint-Satisfying Logic Simulation.
ISVLSI 2002: 151-158 |