| 2007 |
|---|
| 24 | EE | Xiaoping Tang,
Xin Yuan,
Michael S. Gray:
Practical method for obtaining a feasible integer solution in hierarchical layout optimization.
ICCAD 2007: 99-104 |
| 2006 |
|---|
| 23 | EE | Xiaoping Tang,
Xin Yuan:
Technology migration techniques for simplified layouts with restrictive design rules.
ICCAD 2006: 655-660 |
| 22 | EE | Xiaoping Tang,
Ruiqi Tian,
Martin D. F. Wong:
Minimizing wire length in floorplanning.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1744-1753 (2006) |
| 2005 |
|---|
| 21 | EE | Xiaoping Tang,
Ruiqi Tian,
Martin D. F. Wong:
Optimal redistribution of white space for wire length minimization.
ASP-DAC 2005: 412-417 |
| 20 | EE | Hua Xiang,
Xiaoping Tang,
Martin D. F. Wong:
An algorithm for integrated pin assignment and buffer planning.
ACM Trans. Design Autom. Electr. Syst. 10(3): 561-572 (2005) |
| 2004 |
|---|
| 19 | EE | Xiaoping Tang,
Martin D. F. Wong:
On handling arbitrary rectilinear shape constraint.
ASP-DAC 2004: 38-41 |
| 18 | EE | Xiaoping Tang,
Martin D. F. Wong:
Tradeoff routing resource, runtime and quality in buffered routing.
ASP-DAC 2004: 430-433 |
| 17 | EE | Li-Da Huang,
Xiaoping Tang,
Hua Xiang,
Martin D. F. Wong,
I-Min Liu:
A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem [IC layout].
IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 141-147 (2004) |
| 16 | EE | Hua Xiang,
Xiaoping Tang,
Martin D. F. Wong:
Bus-driven floorplanning.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(11): 1522-1530 (2004) |
| 2003 |
|---|
| 15 | EE | Hua Xiang,
Xiaoping Tang,
Martin D. F. Wong:
Bus-Driven Floorplanning.
ICCAD 2003: 66-73 |
| 14 | EE | Hua Xiang,
Xiaoping Tang,
Martin D. F. Wong:
Min-cost flow-based algorithm for simultaneous pin assignment and routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 870-878 (2003) |
| 2002 |
|---|
| 13 | EE | Hua Xiang,
D. F. Wong,
Xiaoping Tang:
An algorithm for integrated pin assignment and buffer planning.
DAC 2002: 584-589 |
| 12 | EE | Xiaoping Tang,
D. F. Wong:
Floorplanning with alignment and performance constraints.
DAC 2002: 848-853 |
| 11 | EE | Li-Da Huang,
Xiaoping Tang,
Hua Xiang,
D. F. Wong,
I-Min Liu:
A Polynomial Time Optimal Diode Insertion/Routing Algorithm for Fixing Antenna Problem.
DATE 2002: 470-477 |
| 10 | EE | Ruiqi Tian,
Ronggang Yu,
Xiaoping Tang,
D. F. Wong:
On mask layout partitioning for electron projection lithography.
ICCAD 2002: 514-518 |
| 9 | EE | Ruiqi Tian,
Xiaoping Tang,
Martin D. F. Wong:
Dummy-feature placement for chemical-mechanical polishinguniformity in a shallow-trench isolation process.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(1): 63-71 (2002) |
| 2001 |
|---|
| 8 | EE | Xiaoping Tang,
D. F. Wong:
FAST-SP: a fast algorithm for block placement based on sequence pair.
ASP-DAC 2001: 521-526 |
| 7 | EE | Hua Xiang,
Xiaoping Tang,
D. F. Wong:
An Algorithm for Simultaneous Pin Assignment and Routing.
ICCAD 2001: 232- |
| 6 | EE | Xiaoping Tang,
Ruiqi Tian,
Hua Xiang,
D. F. Wong:
A New Algorithm for Routing Tree Construction with Buffer Insertion and Wire Sizing under Obstacle Constraints.
ICCAD 2001: 49-56 |
| 5 | EE | Ruiqi Tian,
Xiaoping Tang,
D. F. Wong:
Dummy feature placement for chemical-mechanical polishing uniformity in a shallow trench isolation process.
ISPD 2001: 118-123 |
| 4 | EE | Xiaoping Tang,
Ruiqi Tian,
Martin D. F. Wong:
Fast evaluation of sequence pair in block placement by longestcommon subsequence computation.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(12): 1406-1413 (2001) |
| 3 | EE | Xiaoping Tang,
D. F. Wong:
Network flow based buffer planning.
Integration 30(2): 143-155 (2001) |
| 2000 |
|---|
| 2 | EE | Xiaoping Tang,
D. F. Wong,
Ruiqi Tian:
Fast Evaluation of Sequence Pair in Block Placement by Longest Common Subsequence Computation.
DATE 2000: 106-111 |
| 1 | EE | Xiaoping Tang,
D. F. Wong:
Planning buffer locations by network flows.
ISPD 2000: 180-185 |
