2009 |
13 | EE | Akif Sultan,
John Faricelli,
Sushant Suryagandh,
Hans vanMeer,
Kaveri Mathur,
James Pattison,
Sean Hannon,
Greg Constant,
Kalyana Kumar,
Kevin Carrejo,
Joe Meier,
Rasit Onur Topaloglu,
Darin Chan,
Uwe Hahn,
Thorsten Knopp,
Victor Andrade,
Bill Gardiol,
Steve Hejl,
David Wu,
James Buller,
Larry Bair,
Ali Icel,
Yuri Apanovich:
CAD utilities to comprehend layout-dependent stress effects in 45 nm high- performance SOI custom macro design.
ISQED 2009: 442-446 |
2008 |
12 | EE | Rasit Onur Topaloglu:
Process Variation Characterization and Modeling of Nanoparticle Interconnects for Foldable Electronics.
ISQED 2008: 498-501 |
11 | EE | Andrew B. Kahng,
Puneet Sharma,
Rasit Onur Topaloglu:
Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1241-1252 (2008) |
2007 |
10 | EE | Andrew B. Kahng,
Puneet Sharma,
Rasit Onur Topaloglu:
Exploiting STI stress for performance.
ICCAD 2007: 83-90 |
9 | EE | Rasit Onur Topaloglu:
Energy-Minimization Model for Fill Synthesis.
ISQED 2007: 444-451 |
8 | EE | Andrew B. Kahng,
Rasit Onur Topaloglu:
A DOE Set for Normalization-Based Extraction of Fill Impact on Capacitances.
ISQED 2007: 467-474 |
2006 |
7 | EE | Rasit Onur Topaloglu,
Andrew B. Kahng:
Interconnect Matching Design Rule Inferring and Optimization through Correlation Extraction.
ICCD 2006 |
6 | EE | Rasit Onur Topaloglu:
Monte Carlo-Alternative Probabilistic Simulations for Analog Systems.
ISQED 2006: 249-253 |
5 | EE | Andrew B. Kahng,
Rasit Onur Topaloglu:
Generation of design guarantees for interconnect matching.
SLIP 2006: 29-34 |
4 | EE | Rasit Onur Topaloglu:
Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations.
VTS 2006: 136-142 |
2005 |
3 | EE | Rasit Onur Topaloglu,
Alex Orailoglu:
Forward discrete probability propagation method for device performance characterization under process variations.
ASP-DAC 2005: 220-223 |
2 | EE | Rasit Onur Topaloglu,
Alex Orailoglu:
A DFT approach for diagnosis and process variation-aware structural test of thermometer coded current steering DACs.
DAC 2005: 851-856 |
2004 |
1 | EE | Rasit Onur Topaloglu,
Alex Orailoglu:
On mismatch in the deep sub-micron era - from physics to circuits.
ASP-DAC 2004: 62-67 |