2004 | ||
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3 | EE | Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang, Hsin-Lung Chen: Temporal floorplanning using 3D-subTCG. ASP-DAC 2004: 725-730 |
2002 | ||
2 | EE | Jai-Ming Lin, Hsin-Lung Chen, Yao-Wen Chang: Arbitrary Convex and Concave Rectilinear Module Packing Using TCG. DATE 2002: 69-77 |
1 | EE | Jai-Ming Lin, Hsin-Lung Chen, Yao-Wen Chang: Arbitrarily shaped rectilinear module placement using the transitive closure graph representation. IEEE Trans. VLSI Syst. 10(6): 886-901 (2002) |
1 | Yao-Wen Chang | [1] [2] [3] |
2 | Jai-Ming Lin | [1] [2] |
3 | Chia-Lin Yang | [3] |
4 | Ping-Hung Yuh | [3] |