2007 |
24 | EE | Hiroharu Kawanaka,
Yoshihiro Otani,
Koji Yamamoto,
Tsuyoshi Shinogi,
Shinji Tsuruoka:
Tendency discovery from incident report map generated by self organizing map and its development.
SMC 2007: 2016-2021 |
23 | EE | Halpage Chinthaka Nuwandika Premachandra,
Hiroharu Kawanaka,
Tomohiro Yoshikawa,
Shinji Tsuruoka,
Tsuyoshi Shinogi:
A Study on Modeling Error Estimation for Mobile Robot Based on Coevolutionary Computation and Image Processing.
JACIII 11(7): 825-832 (2007) |
2005 |
22 | EE | Tsuyoshi Shinogi,
Hiroyuki Yamada,
Terumine Hayashi,
Shinji Tsuruoka,
Tomohiro Yoshikawa:
A Test Cost Reduction Method by Test Response and Test Vector Overlapping for Full-Scan Test Architecture.
Asian Test Symposium 2005: 366-371 |
21 | EE | Terumine Hayashi,
Haruna Yoshioka,
Tsuyoshi Shinogi,
Hidehiko Kita,
Haruhiko Takase:
On Test Data Compression Using Selective Don't-Care Identification.
J. Comput. Sci. Technol. 20(2): 210-215 (2005) |
2004 |
20 | EE | Terumine Hayashi,
Haruna Yoshioka,
Tsuyoshi Shinogi,
Hidehiko Kita,
Haruhiko Takase:
Test data compression technique using selective don't-care identification.
ASP-DAC 2004: 230-233 |
2003 |
19 | EE | Tsuyoshi Shinogi,
Yuki Yamada,
Terumine Hayashi,
Tomohiro Yoshikawa,
Shinji Tsuruoka:
Between-Core Vector Overlapping for Test Cost Reduction in Core Testing.
Asian Test Symposium 2003: 268-273 |
2002 |
18 | EE | Ryouji Minehara,
Tomoki Matsumoto,
Tsuyoshi Shinogi,
Tomohiro Yoshikawa,
Shinji Tsuruoka:
An Automatic Recording System of the Plays and Moves of SHOGI Games Using Image Processing Technique.
MVA 2002: 52-55 |
17 | EE | Yoshifumi Banno,
Tomohiro Yoshikawa,
Hiroharu Kawanaka,
Tsuyoshi Shinogi,
Shinji Tsuruoka:
A Study on Deriving a Method for Chromosome Similarities Suitable for the Search Space.
JACIII 6(3): 135-144 (2002) |
2001 |
16 | EE | Tsuyoshi Shinogi,
Tomokazu Kanbayashi,
Tomohiro Yoshikawa,
Shinji Tsuruoka,
Terumine Hayashi:
Faulty Resistance Sectioning Technique for Resistive Bridging Fault ATPG Systems.
Asian Test Symposium 2001: 76-81 |
15 | | Shinji Tsuruoka,
Toru Yamaguchi,
Kenji Kato,
Tomohiro Yoshikawa,
Tsuyoshi Shinogi:
A Camera Control Based Fuzzy Behaviour Recognition of Lecturer for Distance Lecture.
FUZZ-IEEE 2001: 940-943 |
14 | EE | Shinji Tsuruoka,
Toru Tanaka,
Tomohiro Yoshikawa,
Tsuyoshi Shinogi,
Kensuke Takao:
Region Segmentation for Table Image with Unknown Complex Structure.
ICDAR 2001: 709- |
13 | EE | Teruyuki Yamaguchi,
Tomohiro Yoshikawa,
Tsuyoshi Shinogi,
Shinji Tsuruoka,
Masato Teramoto:
A Segmentation Method for Touching Japanese Handwritten Characters Based on Connecting Condition of Line.
ICDAR 2001: 837- |
12 | EE | Junzhi Sang,
Tsuyoshi Shinogi,
Haruhiko Takase,
Hidehiko Kita,
Terumine Hayashi:
An enhanced fault model for high defect coverage.
Systems and Computers in Japan 32(6): 36-44 (2001) |
2000 |
11 | EE | Tsuyoshi Shinogi,
Masahiro Ushio,
Terumine Hayashi:
Cyclic greedy generation method for limited number of IDDQ tests.
Asian Test Symposium 2000: 362- |
10 | EE | Haruhiko Takase,
Tsuyoshi Shinogi,
Terumine Hayashi,
Hidehiko Kita:
Evaluation Function for Fault Tolerant Multi-Layer Neural Networks.
IJCNN (3) 2000: 521-526 |
1999 |
9 | EE | Kai Zhang,
Tsuyoshi Shinogi,
Haruhiko Takase,
Terumine Hayashi:
A Method for Evaluating Upper Bound of Simultaneous Switching Gates Using Circuit Partition.
ASP-DAC 1999: 291-294 |
8 | EE | Tsuyoshi Shinogi,
Terumine Hayashi:
A Parallel Generation System of Compact IDDQ Test Sets for Large Combinational Circuits.
Asian Test Symposium 1999: 164- |
7 | EE | Tsuyoshi Shinogi,
Terumine Hayashi,
Kazuo Taki:
Test generation for stuck-on faults in pass-transistor logic SPL and implementation of DFT circuits.
Systems and Computers in Japan 30(7): 55-68 (1999) |
1998 |
6 | EE | Junzhi Sang,
Tsuyoshi Shinogi,
Haruhiko Takase,
Terumine Hayashi:
On a Logical Fault Model H1SGLF for Enhancing Defect Coverage.
Asian Test Symposium 1998: 102-107 |
5 | EE | Tsuyoshi Shinogi,
Terumine Hayashi:
A Simple and Efficient Method for Generating Compact IDDQ Test Set for Bridging Fault.
VTS 1998: 112-117 |
1997 |
4 | EE | Tsuyoshi Shinogi,
Terumine Hayashi,
Kazuo Taki:
Test Generation for Stuck-On Faults in BDD-Based Pass-Transistor Logic SPL.
Asian Test Symposium 1997: 16-21 |
1992 |
3 | | Kouichi Kumon,
Akira Asato,
Susumu Arai,
Tsuyoshi Shinogi,
Akira Hattori,
Hiroyoshi Hatazawa,
Kiyoshi Hirano:
Architecture and Implementation of PIM/p.
FGCS 1992: 414-424 |
1988 |
2 | | Tsuyoshi Shinogi,
Kouichi Kumon,
Akira Hattori,
Atsuhiro Goto,
Yasunori Kimura,
Takashi Chikayama:
Macro-Call Instruction for the Efficient KL1 Implementation on PIM.
FGCS 1988: 953-961 |
1985 |
1 | | Mitsuhiro Kishimoto,
Tsuyoshi Shinogi,
Yasunori Kimura,
Akira Hattori:
Design and Evaluation of a Prolog Compiler.
LP 1985: 192-203 |