| 2008 |
|---|
| 16 | EE | Bita Gorjiara,
Daniel Gajski:
Automatic architecture refinement techniques for customizing processing elements.
DAC 2008: 379-384 |
| 15 | EE | Mehrdad Reshadi,
Bita Gorjiara,
Daniel Gajski:
C-based design flow: a case study on G.729A for voice over internet protocol (VoIP).
DAC 2008: 72-75 |
| 14 | EE | Bita Gorjiara,
Mehrdad Reshadi,
Daniel Gajski:
Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs.
TRETS 1(2): (2008) |
| 2007 |
|---|
| 13 | EE | Bita Gorjiara,
Nader Bagherzadeh,
Pai H. Chou:
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost.
ASP-DAC 2007: 872-877 |
| 12 | EE | Bita Gorjiara,
Daniel Gajski:
FPGA-friendly code compression for horizontal microcoded custom IPs.
FPGA 2007: 108-115 |
| 11 | EE | Bita Gorjiara,
Daniel Gajski:
A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs.
ICCD 2007: 609-614 |
| 10 | EE | Bita Gorjiara,
Nader Bagherzadeh,
Pai H. Chou:
Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling.
ACM Trans. Design Autom. Electr. Syst. 12(4): (2007) |
| 2006 |
|---|
| 9 | EE | Bita Gorjiara,
Mehrdad Reshadi,
Daniel D. Gajski:
Designing a custom architecture for DCT using NISC technology.
ASP-DAC 2006: 116-117 |
| 8 | EE | Bita Gorjiara,
Mehrdad Reshadi,
Pramod Chandraiah,
Daniel Gajski:
Generic netlist representation for system and PE level design exploration.
CODES+ISSS 2006: 282-287 |
| 7 | EE | Jelena Trajkovic,
Mehrdad Reshadi,
Bita Gorjiara,
Daniel Gajski:
A Graph Based Algorithm for Data Path Optimization in Custom Processors.
DSD 2006: 496-503 |
| 6 | EE | Bita Gorjiara,
Mehrdad Reshadi,
Daniel Gajski:
Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths .
ICCD 2006 |
| 5 | EE | Mehrdad Reshadi,
Bita Gorjiara,
Nikil D. Dutt:
Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2904-2918 (2006) |
| 2005 |
|---|
| 4 | EE | Bita Gorjiara,
Daniel D. Gajski:
Custom Processor Design Using NISC: A Case-Study on DCT algorithm.
ESTImedia 2005: 55-60 |
| 3 | EE | Mehrdad Reshadi,
Bita Gorjiara,
Daniel D. Gajski:
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths.
ICCD 2005: 69-76 |
| 2004 |
|---|
| 2 | EE | Bita Gorjiara,
Pai H. Chou,
Nader Bagherzadeh,
Mehrdad Reshadi,
David Jensen:
Fast and efficient voltage scheduling by evolutionary slack distribution.
ASP-DAC 2004: 659-662 |
| 1 | EE | Bita Gorjiara,
Nader Bagherzadeh,
Pai H. Chou:
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes.
ISLPED 2004: 381-386 |
