39. DAC 2002:
New Orleans,
LA,
USA
Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002.
ACM 2002, ISBN 1-58113-461-4 BibTeX
@proceedings{DBLP:conf/dac/2002,
title = {Proceedings of the 39th Design Automation Conference, DAC 2002,
New Orleans, LA, USA, June 10-14, 2002},
booktitle = {DAC},
publisher = {ACM},
year = {2002},
isbn = {1-58113-461-4},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Wall street evaluates EDA
Web and IP based design
Design innovations for embedded processors
Passive model order reduction
New perspectives in physical design
Panel:
Tools or Users:
Which is the Bigger Bottleneck?
Life after CMOS:
Imminent or Irrelevant?
- George Sery, Shekhar Borkar, Vivek De:
Life is CMOS: why chase the life after?
78-83
Electronic Edition (ACM DL) BibTeX
- H. Bernhard Pogge:
The next chip challenge: effective methods for viable mixed technology SoCs.
84-87
Electronic Edition (ACM DL) BibTeX
- Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier:
Few electron devices: towards hybrid CMOS-SET integrated circuits.
88-93
Electronic Edition (ACM DL) BibTeX
- R. Martel, V. Derycke, J. Appenzeller, Shalom J. Wind, Ph. Avouris:
Carbon nanotube field-effect transistors and logic circuits.
94-98
Electronic Edition (ACM DL) BibTeX
Formal verification
High level specification and design
- Luc Séméria, Renu Mehra, Barry M. Pangrle, Arjuna Ekanayake, Andrew Seawright, Daniel Ng:
RTL c-based methodology for designing and verifying a multi-threaded processor.
123-128
Electronic Edition (ACM DL) BibTeX
- Marcio T. Oliveira, Alan J. Hu:
High-Level specification and automatic generation of IP interface monitors.
129-134
Electronic Edition (ACM DL) BibTeX
- Kerstin Eder, Geoff Barrett:
Achieving maximum performance: a method for the verification of interlocked pipeline control logic.
135-140
Electronic Edition (ACM DL) BibTeX
- Arindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee:
Formal verification of module interfaces against real time specifications.
141-145
Electronic Edition (ACM DL) BibTeX
Timing abstraction
E-textiles
Panel:
Analog Intellectual Property:
Now? Or Never?
Low-power system design
Fabric-driven logic synthesis
Memory management and address optimization in embedded systems
Optics:
lighting the way to EDA riches?
PANEL:
Nanometer Design:
What Hurts Next...?
Novel DFT,
BIST and diagnosis techniques
Case studies in embedded system design
Theoretical foundations of embedded system design
Equivalence verification
PANEL:
Whither (or Wither?) ASIC Handoff
Embedded software automation:
from specification to binary
Applications of reconfigurable computing
New test methods targeting non-classical faults
- Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li Chen, Sujit Dey:
Embedded software-based self-testing for SoC design.
355-360
Electronic Edition (ACM DL) BibTeX
- Swarup Bhunia, Kaushik Roy, Jaume Segura:
A novel wavelet transform based transient current analysis for fault detection and localization.
361-366
Electronic Edition (ACM DL) BibTeX
- Amir Attarha, Mehrdad Nourani:
Signal integrity fault analysis using reduced-order modeling.
367-370
Electronic Edition (ACM DL) BibTeX
- Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams:
Enhancing test efficiency for delay fault testing using multiple-clocked schemes.
371-374
Electronic Edition (ACM DL) BibTeX
How Do You Design a 10M Gate ASIC?
Power distribution issues
- Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Chung-Ping Chen:
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery.
379-384
Electronic Edition (ACM DL) BibTeX
- Srinivas Bodapati, Farid N. Najm:
High-level current macro-model for power-grid analysis.
385-390
Electronic Edition (ACM DL) BibTeX
- Brian W. Amick, Claude R. Gauthier, Dean Liu:
Macro-modeling concepts for the chip electrical interface.
391-394
Electronic Edition (ACM DL) BibTeX
- Hui Zheng, Lawrence T. Pileggi:
Modeling and analysis of regular symmetrically structured power/ground distribution networks.
395-398
Electronic Edition (ACM DL) BibTeX
- Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen:
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients.
399-404
Electronic Edition (ACM DL) BibTeX
Advances in synthesis
Analog synthesis & design methodology
- Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen:
An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits.
431-436
Electronic Edition (ACM DL) BibTeX
- Hongzhou Liu, Amith Singhee, Rob A. Rutenbar, L. Richard Carley:
Remembrance of circuits past: macromodeling by data mining in large analog design spaces.
437-442
Electronic Edition (ACM DL) BibTeX
- Ovidiu Bajdechi, Johan H. Huijsing, Georges G. E. Gielen:
Optimal design of delta-sigma ADCs by design space exploration.
443-448
Electronic Edition (ACM DL) BibTeX
- Jan Vandenbussche, K. Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen:
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter.
449-454
Electronic Edition (ACM DL) BibTeX
Low-power physical design
PANEL:
Unified Tools for SoC Embedded Systems:
Mission Critical,
Mission Impossible or Mission Irrelevant?
Multi-voltage,
multi-threshold design
- Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi:
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique.
480-485
Electronic Edition (ACM DL) BibTeX
- Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar:
Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.
486-491
Electronic Edition (ACM DL) BibTeX
- Dong-In Kang, Jinwoo Suh, Stephen P. Crago:
An optimal voltage synthesis technique for a power-efficient satellite application.
492-497
Electronic Edition (ACM DL) BibTeX
Advanced simulation techniques
Design methodologies meet network applications
Advances in analog modeling
Advances in timing and simulation
Formal Verification Methods:
Getting around the Brick Wall
Routing and buffering
System on chip design
Timing analysis and memory optimization for embedded systems
Processors and accelerators for embedded applications
PANEL:
What's the Next EDA Driver?
Cross-talk noise analysis and management
Test cost reduction for SOCS
Scheduling techniques for embedded systems
Designing SoCs for yield improvement
Advances in SAT
- Gunnar Andersson, Per Bjesse, Byron Cook, Ziyad Hanna:
A proof engine approach to solving combinational design automation problems.
725-730
Electronic Edition (ACM DL) BibTeX
- Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah:
Solving difficult SAT instances in the presence of symmetry.
731-736
Electronic Edition (ACM DL) BibTeX
- Fadi A. Aloul, Brian D. Sierawski, Karem A. Sakallah:
Satometer: how much have we searched?
737-742
Electronic Edition (ACM DL) BibTeX
- Slawomir Pilarski, Gracia Hu:
SAT with partial clauses and back-leaps.
743-746
Electronic Edition (ACM DL) BibTeX
- Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao Zhang, Sharad Malik:
Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver.
747-750
Electronic Edition (ACM DL) BibTeX
Inductance and substrate analysis
Development of processors and communication networks for embedded systems
- Srivaths Ravi, Anand Raghunathan, Nachiketh R. Potlapally, Murugan Sankaradass:
System design methodologies for a wireless security processing platform.
777-782
Electronic Edition (ACM DL) BibTeX
- Alessandro Pinto, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli:
Constraint-driven communication synthesis.
783-788
Electronic Edition (ACM DL) BibTeX
- Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava:
Component-based design approach for multicore SoCs.
789-794
Electronic Edition (ACM DL) BibTeX
- Girish Varatkar, Radu Marculescu:
Traffic analysis for on-chip networks design of multimedia applications.
795-800
Electronic Edition (ACM DL) BibTeX
Moving towards more effective validation
Energy efficient mobile computing
Floorplanning and placement
Circuit effects in static timing
Design space exploration for embedded systems
- Lothar Thiele, Samarjit Chakraborty, Matthias Gries, Simon Künzli:
A framework for evaluating design tradeoffs in packet processing architectures.
880-885
Electronic Edition (ACM DL) BibTeX
- Andrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon:
Energy estimation and optimization of embedded VLIW processors based on instruction clustering.
886-891
Electronic Edition (ACM DL) BibTeX
- Yongsoo Joo, Yongseok Choi, Hojun Shim, Hyung Gyu Lee, Kwanho Kim, Naehyuck Chang:
Energy exploration and reduction of SDRAM memory systems.
892-897
Electronic Edition (ACM DL) BibTeX
Behavioral synthesis
- Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem:
Coordinated transformations for high-level synthesis of high performance microprocessor blocks.
898-903
Electronic Edition (ACM DL) BibTeX
- Jennifer L. Wong, Seapahn Megerian, Miodrag Potkonjak:
Forward-looking objective functions: concept & applications in high level synthesis.
904-909
Electronic Edition (ACM DL) BibTeX
- Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng, Miodrag Potkonjak:
ILP-based engineering change.
910-915
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:04:38 2009
by Michael Ley (ley@uni-trier.de)