Liqiong Wei

2002
12	EE	Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar: Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. DAC 2002: 486-491
11	EE	Zhanping Chen, Liqiong Wei, Ali Keshavarzi, Kaushik Roy: IDDQ Testing for Deep-Submicron ICs: Challenges and Solutions. IEEE Design & Test of Computers 19(2): 24-33 (2002)
10	EE	Liqiong Wei, Rongtian Zhang, Kaushik Roy, Zhanping Chen, David B. Janes: Vertically integrated SOI circuits for low-power and high-performance applications. IEEE Trans. VLSI Syst. 10(3): 351-362 (2002)
2001
9	EE	Zhanping Chen, Liqiong Wei, Kaushik Roy: On effective IDDQ testing of low-voltage CMOS circuits using leakage control techniques. IEEE Trans. VLSI Syst. 9(5): 718-725 (2001)
2000
8	EE	Naran Sirisantana, Liqiong Wei, Kaushik Roy: High-Performance Low-Power CMOS Circuits Using Multiple Channel Length and Multiple Oxide Thickness. ICCD 2000: 227-
7	EE	Zhanping Chen, Liqiong Wei, Kaushik Roy: On Effective IDDQ Testing of Low Voltage CMOS Circuits Using Leakage Control Techniques. ISQED 2000: 181-188
6	EE	Liqiong Wei, Kaushik Roy, Vivek De: Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs. VLSI Design 2000: 24-29
1999
5	EE	Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De: Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications. DAC 1999: 430-435
4	EE	Kaushik Roy, Liqiong Wei, Zhanping Chen: Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications. ISCAS (1) 1999: 366-370
3	EE	Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De: Design and optimization of dual-threshold circuits for low-voltage low-power applications. IEEE Trans. VLSI Syst. 7(1): 16-24 (1999)
1998
2	EE	Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De: Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits. DAC 1998: 489-494
1	EE	Zhanping Chen, Mark Johnson, Liqiong Wei, Kaushik Roy: Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks. ISLPED 1998: 239-244

Coauthor Index

1	Shekhar Y. Borkar (Shekhar Borkar)	[12]
2	Steven M. Burns	[12]
3	Zhanping Chen	[1] [2] [3] [4] [5] [7] [9] [10] [11]
4	Vivek De	[2] [3] [5] [6] [12]
5	Venkatesh Govindarajulu	[12]
6	David B. Janes	[10]
7	Mark Johnson	[1] [2]
8	Mark C. Johnson	[3]
9	Tanay Karnik	[12]
10	Ali Keshavarzi	[11]
11	Kaushik Roy	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
12	Naran Sirisantana	[8]
13	James Tschanz	[12]
14	Yibin Ye	[3] [5] [12]
15	Rongtian Zhang	[10]