| 2004 |
|---|
| 10 | EE | PariVallal Kannan,
Dinesh Bhatia:
Estimating Pre-Placement FPGA Interconnection Requirements.
VLSI Design 2004: 869- |
| 9 | | PariVallal Kannan,
Shankar Balachandran,
Dinesh Bhatia:
On metrics for comparing interconnect estimation methods for FPGAs.
IEEE Trans. VLSI Syst. 12(4): 381-385 (2004) |
| 2003 |
|---|
| 8 | EE | PariVallal Kannan,
Dinesh Bhatia:
Interconnect Estimation for FPGAs under Timing Driven Domains.
ICCD 2003: 344-349 |
| 2002 |
|---|
| 7 | EE | PariVallal Kannan,
Shankar Balachandran,
Dinesh Bhatia:
On metrics for comparing routability estimation methods for FPGAs.
DAC 2002: 70-75 |
| 6 | EE | PariVallal Kannan,
Shankar Balachandran,
Dinesh Bhatia:
Rapid and Reliable Routability Estimation for FPGAs.
FPL 2002: 242-252 |
| 5 | EE | Shankar Balachandran,
PariVallal Kannan,
Dinesh Bhatia:
On Routing Demand and Congestion Estimation for FPGAs.
VLSI Design 2002: 639-646 |
| 2001 |
|---|
| 4 | EE | PariVallal Kannan,
Dinesh Bhatia:
Tightly Integrated Placement and Routing for FPGAs.
FPL 2001: 233-242 |
| 3 | EE | PariVallal Kannan,
Shankar Balachandran,
Dinesh Bhatia:
fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits.
FPL 2001: 37-47 |
| 1999 |
|---|
| 2 | | Dinesh Bhatia,
Kuldeep S. Simha,
PariVallal Kannan:
NEBULA: A Partially and Dynamically Reconfigurable Architecture.
FPL 1999: 405-410 |
| 1998 |
|---|
| 1 | EE | Dinesh Bhatia,
PariVallal Kannan,
Kuldeep S. Simha,
Karthikeya M. Gajjala Purna:
REACT: Reactive Environment for Runtime Reconfiguration.
FPL 1998: 209-217 |
