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Ansuman Banerjee

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2008
16EEAnsuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan: A Dynamic Assertion-Based Verification Platform for Validation of UML Designs. ATVA 2008: 222-227
15EEAnsuman Banerjee, Kausik Datta, Pallab Dasgupta: CheckSpec: A Tool for Consistency and Coverage Analysis of Assertion Specifications. ATVA 2008: 228-233
14EEAritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan: Cohesive Coverage Management for Simulation and Formal Property Verification. ISVLSI 2008: 251-256
13EEAnsuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Auxiliary state machines + context-triggered properties in verification. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
12EEBhaskar Pal, Ansuman Banerjee, Arnab Sinha, Pallab Dasgupta: Accelerating Assertion Coverage With Adaptive Testbenches. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 967-972 (2008)
2007
11EEBhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: BUSpec: A framework for generation of verification aids for standard bus protocol specifications. Integration 40(3): 285-304 (2007)
2006
10EEAnsuman Banerjee, Bhaskar Pal, Sayantan Das, Abhijeet Kumar, Pallab Dasgupta: Test generation games from formal specifications. DAC 2006: 827-832
9EEAnsuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Formal methods for checking realizability of coalitions in 3-party systems. MEMOCODE 2006: 198
8EEPrasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni: Design-Intent Coverage - A New Paradigm for Formal Property Verification. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1922-1934 (2006)
2005
7EESayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix: Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. VLSI Design 2005: 201-206
6EEAnsuman Banerjee, Pallab Dasgupta: The open family of temporal logics: Annotating temporal operators with input constraints. ACM Trans. Design Autom. Electr. Syst. 10(3): 492-522 (2005)
2004
5EESayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni: Formal verification coverage: computing the coverage gap between temporal specifications. ICCAD 2004: 198-203
4EEBhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: The BUSpec platform for automated generation of verification aids for standard bus protocols. MEMOCODE 2004: 119-128
3EEAnsuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Formal Verification of Modules under Real Time Environment Constraints. VLSI Design 2004: 103-108
2003
2EEAnsuman Banerjee, Pallab Dasgupta, Partha Pratim Chakrabarti: Open computation tree logic with fairness. ISCAS (5) 2003: 249-252
2002
1EEArindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee: Formal verification of module interfaces against real time specifications. DAC 2002: 141-145

Coauthor Index

1Roy Armoni [5] [8]
2Prasenjit Basu [5] [7] [8]
3Arindam Chakrabarti [1]
4P. P. Chakrabarti (Partha Pratim Chakrabarti) [1] [2] [3] [4] [5] [7] [8] [9] [11] [13] [14] [16]
5Sayantan Das [5] [7] [8] [10]
6Pallab Dasgupta [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
7Kausik Datta [15]
8Limor Fix [5] [7] [8]
9P. Vignesh V. Ganesan [16]
10Aritra Hazra [14]
11Abhijeet Kumar [10]
12Srobona Mitra [14]
13Chunduri Rama Mohan [5] [7] [8] [14]
14Bhaskar Pal [4] [10] [11] [12]
15S. Ramesh (Sethu Ramesh) [16]
16Sayak Ray [16]
17Arnab Sinha [12]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)