2008 |
25 | EE | Trent McConaghy,
Pieter Palmers,
Georges G. E. Gielen,
Michiel Steyaert:
Automated extraction of expert knowledge in analog topology selection and sizing.
ICCAD 2008: 392-395 |
24 | EE | Jorg Daniels,
Wim Dehaene,
Michiel Steyaert,
Andreas Wiesbauer:
A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter.
ISCAS 2008: 1648-1651 |
23 | EE | Hans Danneels,
Marian Verhelst,
Pieter Palmers,
Wim Vereecken,
Bruno Boury,
Wim Dehaene,
Michiel Steyaert,
Georges G. E. Gielen:
A low-power mixing DAC IR-UWB-receiver.
ISCAS 2008: 2697-2700 |
2007 |
22 | EE | Trent McConaghy,
Pieter Palmers,
Georges G. E. Gielen,
Michiel Steyaert:
Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies.
DAC 2007: 944-947 |
21 | EE | Tom Eeckelaert,
Raf Schoofs,
Georges G. E. Gielen,
Michiel Steyaert,
Willy M. C. Sansen:
An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection.
DATE 2007: 81-86 |
2006 |
20 | EE | Tom Eeckelaert,
Raf Schoofs,
Georges G. E. Gielen,
Michiel Steyaert,
Willy M. C. Sansen:
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard.
DAC 2006: 25-30 |
19 | EE | Raf Schoofs,
Michiel Steyaert,
Willy M. C. Sansen:
A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications.
ISCAS 2006 |
2005 |
18 | EE | Vesselin K. Vassilev,
S. Thijs,
P. L. Segura,
P. Wambacq,
Paul Leroux,
Guido Groeseneken,
M. I. Natarajan,
H. E. Maes,
Michiel Steyaert:
ESD-RF co-design methodology for the state of the art RF-CMOS blocks.
Microelectronics Reliability 45(2): 255-268 (2005) |
2004 |
17 | EE | João Ramos,
Kenneth Francken,
Georges G. E. Gielen,
Michiel Steyaert:
Knowledge- and optimization-based design of RF power amplifiers.
ISCAS (1) 2004: 629-632 |
16 | EE | Marian Verhelst,
Wim Vereecken,
Michiel Steyaert,
Wim Dehaene:
Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps.
ISLPED 2004: 280-285 |
2003 |
15 | EE | Patrick Reynaert,
Koen L. R. Mertens,
Michiel Steyaert:
A state-space behavioral model for CMOS class E power amplifiers.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(2): 132-138 (2003) |
14 | EE | Vesselin K. Vassilev,
S. Jenei,
Guido Groeseneken,
R. Venegas,
S. Thijs,
V. De Heyn,
M. Natarajan Iyer,
Michiel Steyaert,
H. E. Maes:
High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices.
Microelectronics Reliability 43(7): 1011-1020 (2003) |
2002 |
13 | EE | Jan Vandenbussche,
K. Uyttenhove,
Erik Lauwers,
Michiel Steyaert,
Georges G. E. Gielen:
Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter.
DAC 2002: 449-454 |
12 | EE | Michiel Steyaert,
Peter J. Vancorenland:
CMOS: a paradigm for low power wireless?
DAC 2002: 836-841 |
11 | EE | Jan Vandenbussche,
Erik Lauwers,
K. Uyttenhove,
Michiel Steyaert,
Georges G. E. Gielen:
Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter.
DATE 2002: 357-361 |
10 | EE | Peter J. Vancorenland,
Philippe Coppejans,
Wouter De Cock,
Paul Leroux,
Michiel Steyaert:
Optimization of a fully integrated low power CMOS GPS receiver.
ICCAD 2002: 305-308 |
9 | EE | Carl De Ranter,
Michiel Steyaert:
Design techniques for low power high bandwidth upconversion in CMOS.
ISLPED 2002: 237-242 |
8 | EE | Carl De Ranter,
Geert Van der Plas,
Michiel Steyaert,
Georges G. E. Gielen,
Willy M. C. Sansen:
CYCLONE: automated design and layout of RF LC-oscillators.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1161-1170 (2002) |
2001 |
7 | EE | Peter J. Vancorenland,
Geert Van der Plas,
Michiel Steyaert,
Georges G. E. Gielen,
Willy M. C. Sansen:
A Layout-Aware Synthesis Methodology for RF Circuits.
ICCAD 2001: 358- |
2000 |
6 | EE | Carl De Ranter,
B. De Muer,
Geert Van der Plas,
Peter J. Vancorenland,
Michiel Steyaert,
Georges G. E. Gielen,
Willy M. C. Sansen:
CYCLONE: automated design and layout of RF LC-oscillators.
DAC 2000: 11-14 |
5 | EE | Peter J. Vancorenland,
Carl De Ranter,
Michiel Steyaert,
Georges G. E. Gielen:
Optimal RF design using smart evolutionary algorithms.
DAC 2000: 7-10 |
1998 |
4 | EE | A. Marques,
Michiel Steyaert,
Willy M. C. Sansen:
Theory of PLL fractional-N frequency synthesizers.
Wireless Networks 4(1): 79-85 (1998) |
1995 |
3 | EE | Jan Crols,
Stéphane Donnay,
Michiel Steyaert,
Georges G. E. Gielen:
A high-level design and optimization tool for analog RF receiver front-ends.
ICCAD 1995: 550-553 |
1994 |
2 | | Peter R. Kinget,
Michiel Steyaert:
Analogue CMOS VLSI Implementation of Cellular Neural Networks with Continuously Programmable Templates.
ISCAS 1994: 367-370 |
1993 |
1 | | Michiel Steyaert,
Jan Crols,
S. Gogaert,
Willy M. C. Sansen:
Low-voltage Analog CMOS Filter Design.
ISCAS 1993: 1447-1450 |