| |
| 2002 | ||
|---|---|---|
| 7 | EE | Amir Attarha, Mehrdad Nourani: Signal integrity fault analysis using reduced-order modeling. DAC 2002: 367-370 |
| 6 | EE | Amir Attarha, Mehrdad Nourani: Test Pattern Generation for Signal Integrity Faults on Long Interconnects. VTS 2002: 336-344 |
| 5 | EE | Mehrdad Nourani, Amir Attarha: Signal Integrity: Fault Modeling and Testing in High-Speed SoCs. J. Electronic Testing 18(4-5): 539-554 (2002) |
| 2001 | ||
| 4 | EE | Mehrdad Nourani, Amir Attarha: Built-In Self-Test for Signal Integrity. DAC 2001: 792-797 |
| 3 | Amir Attarha, Mehrdad Nourani: Testing interconnects for noise and skew in gigahertz SoCs. ITC 2001: 305-314 | |
| 2 | EE | Amir Attarha, Mehrdad Nourani: Built-In-Chip Testing of Voltage Overshoots in High-Speed SoCs. VTS 2001: 111-116 |
| 2000 | ||
| 1 | EE | Amir Attarha, Mehrdad Nourani, Caro Lucas: Modeling and simulation of real defects using fuzzy logic. DAC 2000: 631-636 |
| 1 | Caro Lucas | [1] |
| 2 | Mehrdad Nourani | [1] [2] [3] [4] [5] [6] [7] |