2008 |
18 | EE | Timothy Kam,
Michael Kishinevsky,
Jordi Cortadella,
Marc Galceran Oms:
Correct-by-construction microarchitectural pipelining.
ICCAD 2008: 434-441 |
17 | EE | Steve Haynal,
Timothy Kam,
Michael Kishinevsky,
Emily Shriver,
Xinning Wang:
A System Verilog Rewriting System for RTL Abstraction with Pentium Case Study.
MEMOCODE 2008: 79-88 |
2006 |
16 | EE | Satrajit Chatterjee,
Alan Mishchenko,
Robert K. Brayton,
Xinning Wang,
Timothy Kam:
Reducing Structural Bias in Technology Mapping.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2894-2903 (2006) |
2005 |
15 | | Satrajit Chatterjee,
Alan Mishchenko,
Robert K. Brayton,
Xinning Wang,
Timothy Kam:
Reducing structural bias in technology mapping.
ICCAD 2005: 519-526 |
2003 |
14 | EE | Alan Mishchenko,
Xinning Wang,
Timothy Kam:
A new enhanced constructive decomposition and mapping algorithm.
DAC 2003: 143-148 |
2002 |
13 | EE | Sumit Gupta,
Nick Savoiu,
Nikil D. Dutt,
Rajesh K. Gupta,
Alexandru Nicolau,
Timothy Kam,
Michael Kishinevsky,
Shai Rotem:
Coordinated transformations for high-level synthesis of high performance microprocessor blocks.
DAC 2002: 898-903 |
1999 |
12 | EE | Yatin Vasant Hoskote,
Timothy Kam,
Pei-Hsin Ho,
Xudong Zhao:
Coverage Estimation for Symbolic Model Checking.
DAC 1999: 300-305 |
1998 |
11 | EE | Pei-Hsin Ho,
Adrian J. Isles,
Timothy Kam:
Formal verification of pipeline control using controlled token nets and abstract interpretation.
ICCAD 1998: 529-536 |
1997 |
10 | EE | Timothy Kam,
Tiziano Villa,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Theory and algorithms for state minimization of nondeterministic FSMs.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(11): 1311-1322 (1997) |
9 | EE | Timothy Kam,
Tiziano Villa,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Implicit computation of compatible sets for state minimization of ISFSMs.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 657-676 (1997) |
8 | EE | Tiziano Villa,
Timothy Kam,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Explicit and implicit algorithms for binate covering problems.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 677-691 (1997) |
1996 |
7 | | Yirng-An Chen,
Edmund M. Clarke,
Pei-Hsin Ho,
Yatin Vasant Hoskote,
Timothy Kam,
Manpreet Khaira,
John W. O'Leary,
Xudong Zhao:
Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking.
FMCAD 1996: 19-33 |
1995 |
6 | EE | Timothy Kam,
Tiziano Villa,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Implicit state minimization of non-deterministic FSMs.
ICCD 1995: 250-257 |
5 | EE | Timothy Kam,
P. A. Subrahmanyam:
Comparing layouts with HDL models: a formal verification technique.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(4): 503-509 (1995) |
1994 |
4 | EE | Adnan Aziz,
Felice Balarin,
Szu-Tsung Cheng,
Ramin Hojati,
Timothy Kam,
Sriram C. Krishnan,
Rajeev K. Ranjan,
Thomas R. Shiple,
Vigyan Singhal,
Serdar Tasiran,
Huey-Yih Wang,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
HSIS: A BDD-Based Environment for Formal Verification.
DAC 1994: 454-459 |
3 | EE | Timothy Kam,
Tiziano Villa,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
A Fully Implicit Algorithm for Exact State Minimization.
DAC 1994: 684-690 |
1992 |
2 | | Timothy Kam,
P. A. Subrahmanyam:
Comparing Layouts with HDL Models: A Formal Verification Technique.
ICCD 1992: 588-591 |
1990 |
1 | | Arvind Srinivasan,
Timothy Kam,
Sharad Malik,
Robert K. Brayton:
Algorithms for Discrete Function Manipulation.
ICCAD 1990: 92-95 |