Ki-Wook Kim

2004
28	EE	Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim: Coupling-aware high-level interconnect synthesis [IC layout]. IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 157-164 (2004)
2003
27	EE	Ki-Wook Kim, Seong-Ook Jung, Taewhan Kim, Sung-Mo Kang: Minimum delay optimization for domino circuits - a coupling-aware approach. ACM Trans. Design Autom. Electr. Syst. 8(2): 202-213 (2003)
26	EE	Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang: Energy-efficient skewed static logic with dual Vt: design and synthesis. IEEE Trans. VLSI Syst. 11(1): 64-70 (2003)
25	EE	Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang: Noise-aware interconnect power optimization in domino logic synthesis. IEEE Trans. VLSI Syst. 11(1): 79-89 (2003)
24	EE	Ki-Wook Kim, Seong-Ook Jung, Taewhan Kim, Prashant Saxena, C. L. Liu, S.-M. S. Kang: Coupling delay optimization by temporal decorrelation using dual threshold voltage technique. IEEE Trans. VLSI Syst. 11(5): 879-887 (2003)
23	EE	Jaesik Lee, Ki-Wook Kim, Yoonjong Huh, Peter Bendix, Sung-Mo Kang: Chip-level charged-device modeling and simulation in CMOS integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 22(1): 67-81 (2003)
22	EE	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang: Timing constraints for domino logic gates with timing-dependent keepers. IEEE Trans. on CAD of Integrated Circuits and Systems 22(1): 96-103 (2003)
2002
21	EE	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang: Low-swing clock domino logic incorporating dual supply and dual threshold voltages. DAC 2002: 467-472
20	EE	Jaesik Lee, Ki-Wook Kim, Sung-Mo Kang: VeriCDF: a new verification methodology for charged device failures. DAC 2002: 874-879
19	EE	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang: Dual Threshold Voltage Domino Logic Synthesis for High Performance with Noise and Power Constrain. DATE 2002: 260-267
18	EE	Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim: Coupling-aware high-level interconnect synthesis for low power. ICCAD 2002: 609-613
17	EE	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang: Optimal Timing for Skew-Tolerant High-Speed Domino Logic. ISVLSI 2002: 41-46
16	EE	Ki-Wook Kim, Taewhan Kim, TingTing Hwang, Sung-Mo Kang, C. L. Liu: Logic transformation for low-power synthesis. ACM Trans. Design Autom. Electr. Syst. 7(2): 265-283 (2002)
15	EE	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang: Noise constrained transistor sizing and power optimization for dual Vst domino logic. IEEE Trans. VLSI Syst. 10(5): 532-541 (2002)
14	EE	Ki-Wook Kim, Taewhan Kim, C. L. Liu, Sung-Mo Kang: Domino logic synthesis based on implication graph. IEEE Trans. on CAD of Integrated Circuits and Systems 21(2): 232-240 (2002)
2001
13	EE	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang: Transistor sizing for reliable domino logic design in dual threshold voltage technologies. ACM Great Lakes Symposium on VLSI 2001: 133-138
12	EE	Ki-Wook Kim, Seong-Ook Jung, Prashant Saxena, C. L. Liu, Sung-Mo Kang: Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique. DAC 2001: 732-737
11	EE	Seong-Ook Jung, Seung-Moon Yoo, Ki-Wook Kim, Sung-Mo Kang: Skew-tolerant high-speed (STHS) domino logic. ISCAS (4) 2001: 154-157
10	EE	Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang: Noise constrained power optimization for dual VT domino logic. ISCAS (4) 2001: 158-161
9	EE	Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang: Energy-efficient skewed static logic design with dual Vt. ISCAS (4) 2001: 882-885
8	EE	Ki-Wook Kim, Seong-Ook Jung, Sung-Mo Kang: Coupling-aware minimum delay optimization for domino logic circuits. ISCAS (5) 2001: 371-374
7	EE	Ki-Wook Kim, Sung-Mo Kang: Crosstalk noise minimization in domino logic design. IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1091-1100 (2001)
2000
6	EE	Ki-Wook Kim, Unni Narayanan, Sung-Mo Kang: Domino logic synthesis minimizing crosstalk. DAC 2000: 280-285
5		Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, C. L. Liu, Sung-Mo Kang: Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design. ICCAD 2000: 318-321
4	EE	Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang: Noise-aware power optimization for on-chip interconnect. ISLPED 2000: 108-113
1999
3	EE	Ki-Wook Kim, Sung-Mo Kang, TingTing Hwang, C. L. Liu: Logic Transformation for Low Power Synthesis. DATE 1999: 158-162
2	EE	Ki-Wook Kim, C. L. Liu, Sung-Mo Kang: Implication graph based domino logic synthesis. ICCAD 1999: 111-114
1996
1	EE	Ki-Wook Kim, Ki-Byoung Kim, Hyoung-Joo Kim: VIRON: An Annotation-Based Video Information Retrieval System. COMPSAC 1996: 298-

Coauthor Index

1	Kwang-Hyun Baek	[5]
2	Peter Bendix	[23]
3	Yoonjong Huh	[23]
4	TingTing Hwang	[3] [16]
5	Seong-Ook Jung	[4] [8] [10] [11] [12] [13] [15] [17] [19] [21] [22] [24] [25] [27]
6	S.-M. S. Kang	[24]
7	Sung-Mo Kang	[2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [21] [22] [23] [25] [26] [27]
8	Chulwoo Kim	[9] [26]
9	Hyoung-Joo Kim	[1]
10	Ki-Byoung Kim	[1]
11	Taewhan Kim	[14] [16] [18] [24] [27] [28]
12	Jaesik Lee	[20] [23]
13	C. L. Liu (Chung Laung (Dave) Liu)	[2] [3] [4] [5] [12] [14] [16] [24] [25]
14	Chun-Gi Lyuh	[18] [28]
15	Unni Narayanan	[4] [6] [25]
16	Prashant Saxena	[12] [24]
17	Naresh R. Shanbhag	[5]
18	Seung-Moon Yoo	[11]

Colors in the list of coauthors