dblp.uni-trier.dewww.uni-trier.de

Kia Bazargan

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo
Home Page

2009
45EEXin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, David J. Lilja: A reconfigurable stochastic architecture for highly reliable computing. ACM Great Lakes Symposium on VLSI 2009: 315-320
44EESatish Sivaswamy, Kia Bazargan, Marc D. Riedel: Estimation and optimization of reliability of noisy digital circuits. ISQED 2009: 213-219
43EEHushrav Mogal, Haifeng Qian, Sachin S. Sapatnekar, Kia Bazargan: Fast and Accurate Statistical Criticality Computation Under Process Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 350-363 (2009)
2008
42EEPongstorn Maidee, Nagib Hakim, Kia Bazargan: FPGA family composition and effects of specialized blocks. FPL 2008: 101-106
41EEHushrav Mogal, Kia Bazargan: Thermal-aware floorplanning for task migration enabled active sub-threshold leakage reduction. ICCAD 2008: 302-305
40EESatish Sivaswamy, Kia Bazargan: Statistical Analysis and Process Variation-Aware Routing and Skew Assignment for FPGAs. TRETS 1(1): (2008)
2007
39EEHushrav Mogal, Kia Bazargan: Microarchitecture floorplanning for sub-threshold leakage reduction. DATE 2007: 1238-1243
38EESatish Sivaswamy, Kia Bazargan: Variation-aware routing for FPGAs. FPGA 2007: 71-79
37EEPongstorn Maidee, Kia Bazargan: A generalized and unified SPFD-based rewiring technique. FPL 2007: 305-310
36EESatish Sivaswamy, Kia Bazargan: Statistical Generic And Chip-Specific Skew Assignment for Improving Timing Yield of FPGAs. FPL 2007: 429-434
35EEHushrav Mogal, Haifeng Qian, Sachin S. Sapatnekar, Kia Bazargan: Clustering based pruning for statistical criticality computation under process variations. ICCAD 2007: 340-343
34EEKia Bazargan, André DeHon: Guest Editorial. IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 201-202 (2007)
2006
33EEPongstorn Maidee, Kia Bazargan: Defect-Tolerant FPGA Architecture Exploration. FPL 2006: 1-6
32EEGang Wang, Satish Sivaswamy, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Elaheh Bozorgzadeh: Statistical Analysis and Design of HARP FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2088-2102 (2006)
31EECristinel Ababei, Hushrav Mogal, Kia Bazargan: Three-dimensional place and route for FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1132-1140 (2006)
30EECristinel Ababei, Kia Bazargan: Non-contiguous linear placement for reconfigurable fabrics. IJES 2(1/2): 86-94 (2006)
2005
29EECristinel Ababei, Hushrav Mogal, Kia Bazargan: Three-dimensional place and route for FPGAs. ASP-DAC 2005: 773-778
28EESatish Sivaswamy, Gang Wang, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Eli Bozorgzadeh: HARP: hard-wired routing pattern FPGAs. FPGA 2005: 21-29
27EECristinel Ababei, Hushrav Mogal, Kia Bazargan: 3D FPGAs: placement, routing, and architecture evaluation (abstract only). FPGA 2005: 263
26EECristinel Ababei, Yan Feng, Brent Goplen, Hushrav Mogal, Tianpei Zhang, Kia Bazargan, Sachin S. Sapatnekar: Placement and Routing in 3D Integrated Circuits. IEEE Design & Test of Computers 22(6): 520-531 (2005)
25EEPongstorn Maidee, Cristinel Ababei, Kia Bazargan: Timing-driven partitioning-based placement for island style FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 24(3): 395-406 (2005)
24EEYing Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan: A Novel Memory Structure for Embedded Systems: Flexible Sequential and Random Access Memory. J. Comput. Sci. Technol. 20(5): 596-606 (2005)
2004
23EEYing Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan: Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory. Asia-Pacific Computer Systems Architecture Conference 2004: 88-101
22EECristinel Ababei, Pongstorn Maidee, Kia Bazargan: Exploring Potential Benefits of 3D FPGA Integration. FPL 2004: 874-880
21EECristinel Ababei, Kia Bazargan: Non-Contiguous Linear Placement for Reconfigurable Fabrics. IPDPS 2004
20EEJohn Lach, Kia Bazargan: Editorial: Special issue on dynamically adaptable embedded systems. ACM Trans. Embedded Comput. Syst. 3(2): 233-236 (2004)
2003
19EEPongstorn Maidee, Cristinel Ababei, Kia Bazargan: Fast timing-driven partitioning-based placement for island style FPGAs. DAC 2003: 598-603
18EEWonjoon Choi, Kia Bazargan: Hierarchical Global Floorplacement Using Simulated Annealing and Network Flow Area Migration. DATE 2003: 11104-11105
17EEKarthikeyan Bhasyam, Kia Bazargan: HW/SW Codesign Incorporating Edge Delays Using Dynamic Programming. DSD 2003: 264-271
16EEVamsi Krishna Marreddy, Sharareh Noorbaloochi, Kia Bazargan: Linear Placement for Static / Dynamic Reconfiguration in JBits. FCCM 2003: 300-301
15EEWonjoon Choi, Kia Bazargan: Incremental Placement for Timing Optimization. ICCAD 2003: 463-466
14EECristinel Ababei, Kia Bazargan: Placement Method Targeting Predictability Robustness and Performance. ICCAD 2003: 81-85
13EECristinel Ababei, Kia Bazargan: Timing Minimization by Statistical Timing hMetis-based Partitioning. VLSI Design 2003: 58-63
2002
12EEJinghuan Chen, Jaekyun Moon, Kia Bazargan: A reconfigurable FPGA-based readback signal generator for hard-drive read channel simulator. DAC 2002: 349-354
11EECristinel Ababei, Kia Bazargan: Statistical Timing Driven Partitioning for VLSI Circuits. DATE 2002: 1109
10EECristinel Ababei, Navaratnasothie Selvakkumaran, Kia Bazargan, George Karypis: Multi-objective circuit partitioning for cutsize and path-based delay minimization. ICCAD 2002: 181-185
2001
9EEKia Bazargan, Seda Ogrenci, Majid Sarrafzadeh: Integrating Scheduling and Physical Design into a Coherent Compilation Cycle for Reconfigurable Computing Architectures. DAC 2001: 635-640
8EEAbhishek Ranjan, Kia Bazargan, S. Ogrenci, Majid Sarrafzadeh: Fast floorplanning for effective prediction and construction. IEEE Trans. VLSI Syst. 9(2): 341-351 (2001)
2000
7EEKia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh: Fast and accurate estimation of floorplans in logic/high-level synthesis. ACM Great Lakes Symposium on VLSI 2000: 95-100
6EEKia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh: A C to Hardware/Software Compiler. FCCM 2000: 331-332
5EEAbhishek Ranjan, Kia Bazargan, Majid Sarrafzadeh: Fast Hierarchical Floorplanning with Congestion and Timing Control. ICCD 2000: 357-362
4EEKia Bazargan, Ryan Kastner, Majid Sarrafzadeh: Fast Template Placement for Reconfigurable Computing Systems. IEEE Design & Test of Computers 17(1): 68-83 (2000)
1999
3EEKia Bazargan, Ryan Kastner, Majid Sarrafzadeh: 3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. IEEE International Workshop on Rapid System Prototyping 1999: 38-
2EEKia Bazargan, Samjung Kim, Majid Sarrafzadeh: Nostradamus: a floorplanner of uncertain designs. IEEE Trans. on CAD of Integrated Circuits and Systems 18(4): 389-397 (1999)
1998
1EEKia Bazargan, Samjung Kim, Majid Sarrafzadeh: Nostradamus: a floorplanner of uncertain design. ISPD 1998: 18-23

Coauthor Index

1Cristinel Ababei [10] [11] [13] [14] [19] [21] [22] [25] [26] [27] [28] [29] [30] [31] [32]
2Karthikeyan Bhasyam [17]
3Elaheh Bozorgzadeh (Eli Bozorgzadeh) [28] [32]
4Jinghuan Chen [12]
5Ying Chen [23] [24]
6Wonjoon Choi [15] [18]
7André DeHon [34]
8Yan Feng [26]
9Brent Goplen [26]
10Nagib Hakim [42]
11George Karypis [10]
12Ryan Kastner [3] [4] [6] [28] [32]
13Samjung Kim [1] [2]
14John Lach [20]
15Xin Li [45]
16David J. Lilja [23] [24] [45]
17Pongstorn Maidee [19] [22] [25] [33] [37] [42]
18Vamsi Krishna Marreddy [16]
19Seda Ogrenci Memik (Seda Ogrenci) [6] [9]
20Hushrav Mogal [26] [27] [29] [31] [35] [39] [41] [43]
21Jaekyun Moon [12]
22Sharareh Noorbaloochi [16]
23S. Ogrenci [8]
24Vasudev V. Pai [23] [24]
25Haifeng Qian [35] [43]
26Weikang Qian [45]
27Karthik Ranganathan [23] [24]
28Abhishek Ranjan [5] [7] [8]
29Marc D. Riedel [44] [45]
30Sachin S. Sapatnekar [26] [35] [43]
31Majid Sarrafzadeh [1] [2] [3] [4] [5] [6] [7] [8] [9]
32Navaratnasothie Selvakkumaran [10]
33Satish Sivaswamy [28] [32] [36] [38] [40] [44]
34Gang Wang [28] [32]
35Tianpei Zhang [26]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)