Patrick Groeneveld

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17EEChris Bartels, Jos Huisken, Kees Goossens, Patrick Groeneveld, Jef L. van Meerbergen: Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip. VLSI-SoC 2006: 80-85
16 Patrick Groeneveld, Louis Scheffer: Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005 ACM 2005
15EEJurjen Westra, Patrick Groeneveld: Post-Placement Pin Optimiztion. ISVLSI 2005: 238-243
14EEJurjen Westra, Patrick Groeneveld: Towards Integration of Quadratic Placement and Pin Assignment. ISVLSI 2005: 284-286
13EEJurjen Westra, Patrick Groeneveld: Is probabilistic congestion estimation worthwhile? SLIP 2005: 99-106
12 Charles J. Alpert, Patrick Groeneveld: Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004 ACM 2004
11EEFrancky Catthoor, Andrea Cuomo, Grant Martin, Patrick Groeneveld, Rudy Lauwereins, Karen Maex, Patrick van de Steeg, Ron Wilson: How Can System-Level Design Solve the Interconnect Technology Scaling Problem? DATE 2004: 332-339
10EEJurjen Westra, Chris Bartels, Patrick Groeneveld: Probabilistic congestion prediction. ISPD 2004: 204-209
9EEAndrew B. Kahng, Shekhar Borkar, John M. Cohn, Antun Domic, Patrick Groeneveld, Louis Scheffer, Jean-Pierre Schoellkopf: Nanometer design: place your bets. DAC 2003: 546-547
8EEAndrew B. Kahng, Ronald Collett, Patrick Groeneveld, Lavi Lev, Nancy Nettleton, Paul K. Rodman, Lambert van den Hoven: Tools or users: which is the bigger bottleneck? DAC 2002: 76-77
7EERalph H. J. M. Otten, Raul Camposano, Patrick Groeneveld: Design Automation for Deepsubmicron: Present and Future. DATE 2002: 650-659
6EEPatrick Groeneveld: Physical Design Challenges for Billion Transistor Chips. ICCD 2002: 78-83
5EERob A. Rutenbar, Olivier Coudert, Patrick Groeneveld, Jürgen Koehl, Scott Peterson, Vivek Raghavan, Naresh Soni: Automatic Hierarchical Design: Fantasy or Reality? (Panel). ICCAD 2001: 656-
4EERaul Camposano, Olivier Coudert, Patrick Groeneveld, Leon Stok, Ralph H. J. M. Otten: Timing closure: the solution and its problems. ASP-DAC 2000: 359-364
3EERaul Camposano, Jacob Greidinger, Patrick Groeneveld, Michael Jackson, Lawrence T. Pileggi, Louis Scheffer: Design closure (panel session): hope or hype? DAC 2000: 176-177
2EEPatrick Groeneveld, Jacob Greidinger, J. George Janac, Wilm E. Donath: The right floorplanning formulations for future chip implementation methodologies (panel discussion - title only). ISPD 2000: 214
1EEPatrick Groeneveld: A multiple layer contour-based gridless channel router. IEEE Trans. on CAD of Integrated Circuits and Systems 9(12): 1278-1288 (1990)

Coauthor Index

1Charles J. Alpert [12]
2Chris Bartels [10] [17]
3Shekhar Y. Borkar (Shekhar Borkar) [9]
4Raul Camposano [3] [4] [7]
5Francky Catthoor [11]
6John M. Cohn [9]
7Ronald Collett [8]
8Olivier Coudert [4] [5]
9Andrea Cuomo [11]
10Antun Domic [9]
11Wilm E. Donath [2]
12Kees G. W. Goossens (Kees Goossens) [17]
13Jacob Greidinger [2] [3]
14Lambert van den Hoven [8]
15Jos Huisken [17]
16Michael Jackson [3]
17J. George Janac [2]
18Andrew B. Kahng [8] [9]
19Jürgen Koehl [5]
20Rudy Lauwereins [11]
21Lavi Lev [8]
22Karen Maex [11]
23Grant Martin [11]
24Jef L. van Meerbergen [17]
25Nancy Nettleton [8]
26Ralph H. J. M. Otten [4] [7]
27Scott Peterson [5]
28Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage) [3]
29Vivek Raghavan [5]
30Paul K. Rodman [8]
31Rob A. Rutenbar [5]
32Louis Scheffer [3] [9] [16]
33Jean-Pierre Schoellkopf [9]
34Naresh Soni [5]
35Patrick van de Steeg [11]
36Leon Stok [4]
37Jurjen Westra [10] [13] [14] [15]
38Ron Wilson [11]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)