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Jai-Ming Lin

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2005
14EEJai-Ming Lin, Guang-Ming Wu, Yao-Wen Chang, Jen-Hui Chuang: Placement with symmetry constraints for analog layout design using TCG-S. ASP-DAC 2005: 1135-1137
13EEJai-Ming Lin, Yao-Wen Chang: TCG: A transitive closure graph-based representation for general floorplans. IEEE Trans. VLSI Syst. 13(2): 288-292 (2005)
2004
12EEJai-Ming Lin, Yao-Wen Chang: TCG-S: orthogonal coupling of P/sup */-admissible representations for general floorplans. IEEE Trans. on CAD of Integrated Circuits and Systems 23(6): 968-980 (2004)
2003
11EEJai-Ming Lin, Yao-Wen Chang, Shih-Ping Lin: Corner sequence - a P-admissible floorplan representation with a worst case linear-time packing scheme. IEEE Trans. VLSI Syst. 11(4): 679-686 (2003)
2002
10EEJai-Ming Lin, Yao-Wen Chang: TCG-S: orthogonal coupling of P*-admissible representations for general floorplans. DAC 2002: 842-847
9EEJai-Ming Lin, Hsin-Lung Chen, Yao-Wen Chang: Arbitrary Convex and Concave Rectilinear Module Packing Using TCG. DATE 2002: 69-77
8EEGuang-Ming Wu, Jai-Ming Lin, Yao-Wen Chang: Performance-driven placement for dynamically reconfigurable FPGAs. ACM Trans. Design Autom. Electr. Syst. 7(4): 628-642 (2002)
7EEJai-Ming Lin, Hsin-Lung Chen, Yao-Wen Chang: Arbitrarily shaped rectilinear module placement using the transitive closure graph representation. IEEE Trans. VLSI Syst. 10(6): 886-901 (2002)
2001
6EEJai-Ming Lin, Yao-Wen Chang: TCG: A Transitive Closure Graph-Based Representation for Non-Slicing Floorplans. DAC 2001: 764-769
5 Guang-Ming Wu, Jai-Ming Lin, Mango Chia-Tso Chao, Yao-Wen Chang: Generic ILP-Based Approaches for Dynamically Reconfigurable FPGA Partitioning. ICCD 2001: 335-347
4 Guang-Ming Wu, Jai-Ming Lin, Yao-Wen Chang: An Algorithm for Dynamically Reconfigurable FPGA Placement. ICCD 2001: 501-504
3EEGuang-Ming Wu, Jai-Ming Lin, Yao-Wen Chang: Generic ILP-based approaches for time-multiplexed FPGA partitioning. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1266-1274 (2001)
2EEYao-Wen Chang, Jai-Ming Lin, Martin D. F. Wong: Matching-based algorithm for FPGA channel segmentation design. IEEE Trans. on CAD of Integrated Circuits and Systems 20(6): 784-791 (2001)
1998
1EEYao-Wen Chang, Jai-Ming Lin, D. F. Wong: Graph matching-based algorithms for FPGA segmentation design. ICCAD 1998: 34-39

Coauthor Index

1Yao-Wen Chang [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
2Mango Chia-Tso Chao [5]
3Hsin-Lung Chen [7] [9]
4Jen-Hui Chuang [14]
5Shih-Ping Lin [11]
6Martin D. F. Wong (D. F. Wong) [1] [2]
7Guang-Ming Wu [3] [4] [5] [8] [14]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)