| 2008 |
|---|
| 20 | EE | Christian Sauer,
Matthias Gries,
Hans-Peter Löb:
SystemClick: a domain-specific framework for early exploration using functional performance models.
DAC 2008: 480-485 |
| 2007 |
|---|
| 19 | EE | Christian Sauer,
Matthias Gries,
Sebastian Dirk:
Interactive presentation: Hard- and software modularity of the NOVA MPSoC platform.
DATE 2007: 1102-1107 |
| 2006 |
|---|
| 18 | EE | Sören Sonntag,
Matthias Gries,
Christian Sauer:
Performance Evaluation of Packet Processing Architectures Using Multiclass Queuing Networks.
Annual Simulation Symposium 2006: 80-89 |
| 17 | EE | Christian Sauer,
Matthias Gries,
Jörg-Christian Niemann,
Mario Porrmann,
Michael Thies:
Application-Driven Development of Concurrent Packet Processing Platforms.
PARELEC 2006: 55-61 |
| 2005 |
|---|
| 16 | EE | Christian Sauer,
Matthias Gries,
Sören Sonntag:
Modular domain-specific implementation and exploration framework for embedded software platforms.
DAC 2005: 254-259 |
| 15 | | Hans-Martin Blüthgen,
Christian Sauer,
Dominik Langen,
Matthias Gries,
Wolfgang Raab:
Application-Driven Design of Cost-Efficient Communications Platforms.
GI Jahrestagung (1) 2005: 314-318 |
| 14 | | Sören Sonntag,
Matthias Gries,
Christian Sauer:
Performance Evaluation of VLSI platforms using SystemQ.
GI Jahrestagung (1) 2005: 319-323 |
| 13 | EE | Christian Sauer,
Matthias Gries,
Sören Sonntag:
Modular Reference Implementation of an IP-DSLAM.
ISCC 2005: 191-198 |
| 12 | EE | Christian Sauer,
Matthias Gries,
Sören Sonntag,
Dietmar Tolle,
Bo Wu,
Rudi Knorr:
Trends in Access Networks and their Implementation in DSLAMs.
LCN 2005: 493-494 |
| 11 | EE | Sören Sonntag,
Matthias Gries,
Christian Sauer:
SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC.
SAMOS 2005: 434-444 |
| 2004 |
|---|
| 10 | EE | Scott J. Weber,
Matthew W. Moskewicz,
Matthias Gries,
Christian Sauer,
Kurt Keutzer:
Fast cycle-accurate simulation and instruction set generation for constraint-based descriptions of programmable architectures.
CODES+ISSS 2004: 18-23 |
| 9 | EE | Christian Sauer,
Matthias Gries,
José Ignacio Gómez,
Scott J. Weber,
Kurt Keutzer:
Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express.
PARELEC 2004: 129-134 |
| 8 | EE | Matthias Gries:
Methods for evaluating and covering the design space during early design development.
Integration 38(2): 131-183 (2004) |
| 2003 |
|---|
| 7 | EE | Chidamber Kulkarni,
Matthias Gries,
Christian Sauer,
Kurt Keutzer:
Programming challenges in network processor deployment.
CASES 2003: 178-187 |
| 6 | EE | Matthias Gries,
Chidamber Kulkarni,
Christian Sauer,
Kurt Keutzer:
Comparing Analytical Modeling with Simulation for Network Processors: A Case Study.
DATE 2003: 20256-20261 |
| 2002 |
|---|
| 5 | EE | Lothar Thiele,
Samarjit Chakraborty,
Matthias Gries,
Simon Künzli:
A framework for evaluating design tradeoffs in packet processing architectures.
DAC 2002: 880-885 |
| 4 | EE | Samarjit Chakraborty,
Matthias Gries,
Lothar Thiele:
Supporting a Low Delay Best-Effort Class in the Presence of Real-Time Traffic.
IEEE Real Time Technology and Applications Symposium 2002: 45-54 |
| 2001 |
|---|
| 3 | EE | Lothar Thiele,
Samarjit Chakraborty,
Matthias Gries,
Alexander Maxiaguine,
Jonas Greutert:
Embedded Software in Network Processors - Models and Algorithms.
EMSOFT 2001: 416-434 |
| 2 | EE | Karsten Strehl,
Lothar Thiele,
Matthias Gries,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich:
FunState-an internal design representation for codesign.
IEEE Trans. VLSI Syst. 9(4): 524-544 (2001) |
| 2000 |
|---|
| 1 | EE | Matthias Gries:
The Impact of Recent DRAM Architectures on Embedded Systems Performance.
EUROMICRO 2000: 1282- |
