| 2002 |
|---|
| 6 | EE | Ajay J. Daga,
Loa Mize,
Subramanyam Sripada,
Chris Wolff,
Qiuyang Wu:
Automated timing model generation.
DAC 2002: 146-151 |
| 1997 |
|---|
| 5 | EE | Ajay J. Daga,
Peter Suaris:
Interface Timing Verification Drives System Design.
DAC 1997: 240-245 |
| 4 | EE | Ajay J. Daga,
William P. Birmingham:
Interface finite-state machines: definition, minimization, and decomposition.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(5): 497-505 (1997) |
| 1995 |
|---|
| 3 | EE | Ajay J. Daga,
William P. Birmingham:
A symbolic-simulation approach to the timing verification of interacting FSMs.
ICCD 1995: 584-589 |
| 1994 |
|---|
| 2 | EE | Ajay J. Daga,
William P. Birmingham:
The Minimization and Decomposition of Interface State Machines.
DAC 1994: 120-125 |
| 1990 |
|---|
| 1 | EE | Ajay J. Daga,
William P. Birmingham:
Failure Recovery in the MICON System.
DAC 1990: 686-691 |
