Samy Meftali

2008
16	EE	Imran Rafiq Quadri, Samy Meftali, Jean-Luc Dekeyser: MARTE based modeling approach for Partial Dynamic Reconfigurable FPGAs. ESTImedia 2008: 47-52
15	EE	Imran Rafiq Quadri, Pierre Boulet, Samy Meftali, Jean-Luc Dekeyser: Using an MDE Approach for Modeling of Interconnection Networks. ISPAN 2008: 289-294
2007
14	EE	Philippe Marquet, Simon Duquennoy, Sébastien Le Beux, Samy Meftali, Jean-Luc Dekeyser: Massively parallel processing on a chip. Conf. Computing Frontiers 2007: 277-286
13	EE	Rabie Ben Atitallah, Smaïl Niar, Samy Meftali, Jean-Luc Dekeyser: An MPSoC Performance Estimation Framework Using Transaction Level Modeling. RTCSA 2007: 525-533
2006
12	EE	Rabie Ben Atitallah, Smaïl Niar, Alain Greiner, Samy Meftali, Jean-Luc Dekeyser: Estimating Energy Consumption for an MPSoC Architectural Exploration. ARCS 2006: 298-310
2005
11	EE	Samy Meftali, Anouar Dziri, Luc Charest, Philippe Marquet, J. Deskeyser: SOAP Based Distributed Simulation Environment for SoC Design. FDL 2005: 283-291
10	EE	J. Vennin, S. Penain, Luc Charest, Samy Meftali, Jean-Luc Dekeyser: Embed Scripting inside SystemC. FDL 2005: 373-385
9	EE	Samy Meftali, Jean-Luc Dekeyser, Isaac D. Scherson: Scalable Multistage Network for Multiprocessor System-on-Chip Design. ISPAN 2005: 352-357
2004
8	EE	E. Turbatu, Samy Meftali, Smaïl Niar, Jean-Luc Dekeyser: An automatic communication synthesis for high level SOC desing using transaction level modelling (poster). FDL 2004: 378-380
7	EE	M. Samyn, Samy Meftali, Jean-Luc Dekeyser: MDA Based, SystemC Code Generation, Applied to Intensive Signal Processing Applications. FDL 2004: 452-463
6	EE	Samy Meftali, Jean-Luc Dekeyser: An Optimal Charge Balancing Model for Fast Distributed SystemC Simulation in IP/SoC Design. IWSOC 2004: 55-58
5		Samy Meftali, Jean-Luc Dekeyser: SoCP2P: A Peer-to-Peer IPS Based SoC Design and Simulation Tool. Virtual Enterprises and Collaborative Networks 2004: 387-394
2002
4	EE	Ferid Gharsalli, Samy Meftali, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic generation of embedded memory wrapper for multiprocessor SoC. DAC 2002: 596-601
3	EE	Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali, Frédéric Rousseau, Ferid Gharsalli: Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design. ISSS 2002: 26-31
2001
2		Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: An optimal memory allocation for application-specific multiprocessor system-on-chip. ISSS 2001: 19-24
1		Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya: Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory. VLSI-SOC 2001: 193-204

Coauthor Index

1	Rabie Ben Atitallah	[12] [13]
2	Sébastien Le Beux	[14]
3	Pierre Boulet	[15]
4	Luc Charest	[10] [11]
5	Jean-Luc Dekeyser	[5] [6] [7] [8] [9] [10] [12] [13] [14] [15] [16]
6	J. Deskeyser	[11]
7	Simon Duquennoy	[14]
8	Anouar Dziri	[11]
9	Ferid Gharsalli	[1] [2] [3] [4]
10	Alain Greiner	[12]
11	Ahmed Amine Jerraya	[1] [2] [3] [4]
12	Damien Lyonnard	[3]
13	Philippe Marquet	[11] [14]
14	Smaïl Niar	[8] [12] [13]
15	S. Penain	[10]
16	Imran Rafiq Quadri	[15] [16]
17	Frédéric Rousseau	[1] [2] [3] [4]
18	M. Samyn	[7]
19	Isaac D. Scherson	[9]
20	E. Turbatu	[8]
21	J. Vennin	[10]

Colors in the list of coauthors