2009 |
14 | EE | Spyros Apostolacos,
George Lykakis,
Apostolos Meliones,
Vassilis Vlagoulis,
Emmanuel Touloupis,
George E. Konstantoulakis:
Design, Implementation and Validation of an Open Source IP-PBX/VoIP Gateway SoC.
VLSI Design 2009: 261-266 |
2007 |
13 | EE | Kyriakos Vlachos,
Theofanis Orphanoudakis,
Ioannis Papaefstathiou,
Nikos A. Nikolaou,
Dionisios N. Pnevmatikatos,
George E. Konstantoulakis,
Jorge-A. Sanchez-P.:
Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units.
Microprocessors and Microsystems 31(3): 188-199 (2007) |
2004 |
12 | EE | Ioannis Papaefstathiou,
Stylianos Perissakis,
Theofanis Orphanoudakis,
Nikos A. Nikolaou,
George Kornaros,
Nicholas Zervos,
George E. Konstantoulakis,
Dionisios N. Pnevmatikatos,
Kyriakos Vlachos:
PRO3: A Hybrid NPU Architecture.
IEEE Micro 24(5): 20-33 (2004) |
2003 |
11 | EE | George Lykakis,
N. Mouratidis,
Kyriakos Vlachos,
Nikos A. Nikolaou,
Stylianos Perissakis,
G. Sourdis,
George E. Konstantoulakis,
Dionisios N. Pnevmatikatos,
Dionisios I. Reisis:
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip.
DATE 2003: 20014-20019 |
10 | EE | Ioannis Papaefstathiou,
Helen-Catherine Leligou,
Theofanis Orphanoudakis,
George Kornaros,
Nicholaos Zervos,
George E. Konstantoulakis:
An innovative scheduling scheme for high-speed network processors.
ISCAS (2) 2003: 93-96 |
9 | EE | Kyriakos Vlachos,
Nikos A. Nikolaou,
Theofanis Orphanoudakis,
Stylianos Perissakis,
Dionisios N. Pnevmatikatos,
George Kornaros,
J. A. Sanchez,
George E. Konstantoulakis:
Processing and Scheduling Components in an Innovative Network Processor Architecture.
VLSI Design 2003: 195-201 |
8 | EE | Theofanis Orphanoudakis,
Stylianos Perissakis,
Kostas Pramataris,
Nikos A. Nikolaou,
Nicholas Zervos,
Matthias Steck,
Christoph Baumhof,
Diederik Verkest,
Chantal Ykman-Couvreur,
Gregory Doumenis,
Fotis Karoubalis,
Ioanna Theologitou,
Dionisios I. Reisis,
George E. Konstantoulakis,
Nikos Vogiatzis:
Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks.
Telecommunication Systems 23(3-4): 351-367 (2003) |
2002 |
7 | EE | Chantal Ykman-Couvreur,
J. Lambrecht,
Diederik Verkest,
Francky Catthoor,
Aristides Nikologiannis,
George E. Konstantoulakis:
System-level performance optimization of the data queueing memory management in high-speed network processors.
DAC 2002: 518-523 |
2001 |
6 | EE | Gregory Doumenis,
George E. Konstantoulakis,
G. Korinthios,
George Lykakis,
Dionisios I. Reisis,
G. Synnefakis:
A Parallel VLSI Video/Communication Controller.
VLSI Signal Processing 28(3): 245-257 (2001) |
2000 |
5 | | Nikolaos D. Doulamis,
Anastasios D. Doulamis,
George E. Konstantoulakis,
George I. Stassinopoulos:
Efficient modeling of VBR MPEG-1 coded video sources.
IEEE Trans. Circuits Syst. Video Techn. 10(1): 93-112 (2000) |
1997 |
4 | | Nikolaos D. Doulamis,
Anastasios D. Doulamis,
George E. Konstantoulakis,
George I. Stassinopoulos:
Performance Models for Multiplexed VBR MPEG Video Sources.
ICC (2) 1997: 856-861 |
3 | | Stelios Sartzetakis,
Panos Georgatsos,
George E. Konstantoulakis,
George Pavlou,
David Griffin:
Unified Fault, Resource Management and Control in ATM-based IBCN.
Integrated Network Management 1997: 262-274 |
1996 |
2 | | Anastasios D. Doulamis,
Nikolaos D. Doulamis,
George E. Konstantoulakis,
George I. Stassinopoulos:
Traffic characterisation and modelling of VBR coded MPEG sources.
Modelling and Evaluation of ATM Networks 1996: 62-81 |
1994 |
1 | | George E. Konstantoulakis,
George I. Stassinopoulos:
High performance ATM terminals: design and evaluation.
Modelling and Evaluation of ATM Networks 1994: 596-618 |