2003 |
9 | EE | Tom Eeckelaert,
Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
Generalized Posynomial Performance Modeling.
DATE 2003: 10250-10255 |
8 | EE | Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 517-534 (2003) |
2002 |
7 | EE | Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits.
DAC 2002: 431-436 |
6 | EE | Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics.
DATE 2002: 268-273 |
5 | EE | Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
Circuit simplification for the symbolic analysis of analogintegrated circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 395-407 (2002) |
2001 |
4 | EE | Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing.
ICCAD 2001: 70-74 |
2000 |
3 | EE | Geert Van der Plas,
Jan Vandenbussche,
Walter Daems,
Antal van den Bosch,
Georges G. E. Gielen,
Willy M. C. Sansen:
Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter.
DAC 2000: 452-457 |
1999 |
2 | EE | Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits.
DAC 1999: 958-963 |
1997 |
1 | EE | Francky Leyn,
Walter Daems,
Georges G. E. Gielen,
Willy M. C. Sansen:
A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps.
ICCAD 1997: 374-381 |