| 2004 |
|---|
| 7 | EE | Victor V. Zyuban,
David Brooks,
Viji Srinivasan,
Michael Gschwind,
Pradip Bose,
Philip N. Strenski,
Philip G. Emma:
Integrated Analysis of Power and Performance for Pipelined Microprocessors.
IEEE Trans. Computers 53(8): 1004-1016 (2004) |
| 2003 |
|---|
| 6 | EE | Victor V. Zyuban,
Philip N. Strenski:
Balancing hardware intensity in microprocessor pipelines.
IBM Journal of Research and Development 47(5-6): 585-598 (2003) |
| 2002 |
|---|
| 5 | EE | Xiaoliang Bai,
Chandramouli Visweswariah,
Philip N. Strenski:
Uncertainty-aware circuit optimization.
DAC 2002: 58-63 |
| 4 | EE | Victor V. Zyuban,
Philip N. Strenski:
Unified methodology for resolving power-performance tradeoffs at the microarchitectural and circuit levels.
ISLPED 2002: 166-171 |
| 3 | EE | Viji Srinivasan,
David Brooks,
Michael Gschwind,
Pradip Bose,
Victor V. Zyuban,
Philip N. Strenski,
Philip G. Emma:
Optimizing pipelines for power and performance.
MICRO 2002: 333-344 |
| 1999 |
|---|
| 2 | EE | Andrew R. Conn,
Ibrahim M. Elfadel,
W. W. Molzen,
P. R. O'Brien,
Philip N. Strenski,
Chandramouli Visweswariah,
C. B. Whan:
Gradient-Based Optimization of Custom Circuits Using a Static-Timing Formulation.
DAC 1999: 452-459 |
| 1991 |
|---|
| 1 | | Philip N. Strenski,
Scott Kirkpatrick:
Analysis of Finite Length Annealing Schedules.
Algorithmica 6(3): 346-366 (1991) |
