Shai Rotem

2003
7	EE	Ken S. Stevens, Ran Ginosar, Shai Rotem: Relative timing [asynchronous design]. IEEE Trans. VLSI Syst. 11(1): 129-140 (2003)
2002
6	EE	Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem: Coordinated transformations for high-level synthesis of high performance microprocessor blocks. DAC 2002: 898-903
2000
5	EE	Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri: CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. ASYNC 2000: 62-72
1999
4	EE	Ken S. Stevens, Shai Rotem, Ran Ginosar: Relative Timing. ASYNC 1999: 208-218
3	EE	Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun: RAPPID: An Asynchronous Instruction Length Decoder. ASYNC 1999: 60-70
2	EE	Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken: CAD Directions for High Performance Asynchronous Circuits. DAC 1999: 116-121
1998
1	EE	Wei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun: Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. ASYNC 1998: 80-

Coauthor Index

1	Boris Agapiev	[3]
2	Peter A. Beerel	[1] [3]
3	Steven M. Burns	[2]
4	Parimal Pal Chaudhuri	[5]
5	Wei-Chun Chou	[1]
6	Jordi Cortadella	[2]
7	Charles Dike	[3]
8	Nikil D. Dutt (Nikil Dutt)	[6]
9	Ran Ginosar	[1] [2] [3] [4] [7]
10	Rajesh K. Gupta (Rajesh Gupta)	[6]
11	Sumit Gupta	[6]
12	Timothy Kam	[6]
13	Michael Kishinevsky	[2] [6]
14	Rakefet Kol	[1] [3]
15	Chris J. Myers	[1] [3]
16	Alexandru Nicolau (Alex Nicolau)	[6]
17	Rajesh Pendurkar	[5]
18	Marly Roncken	[2] [3] [5]
19	Nicolae Savoiu (Nick Savoiu)	[6]
20	Ken S. Stevens	[1] [2] [3] [4] [5] [7]
21	Kenneth Y. Yun	[1] [3]