| 2008 |
|---|
| 14 | EE | Hyunok Oh:
Constant Rate Dataflow Model with Intermediate Ports for Efficient Code Synthesis with Top-Down Design and Dynamic Behavior.
ISQED 2008: 190-193 |
| 2006 |
|---|
| 13 | EE | Hyunok Oh,
Nikil Dutt,
Soonhoi Ha:
Memory optimal single appearance schedule with dynamic loop count for synchronous dataflow graphs.
ASP-DAC 2006: 497-502 |
| 12 | EE | Minyoung Kim,
Hyunok Oh,
Nikil Dutt,
Alex Nicolau,
Nalini Venkatasubramanian:
PBPAIR: an energy-efficient error-resilient encoding using probability based power aware intra refresh.
Mobile Computing and Communications Review 10(3): 58-69 (2006) |
| 2005 |
|---|
| 11 | EE | Hyunok Oh,
Nikil D. Dutt,
Soonhoi Ha:
Single appearance schedule with dynamic loop count for minimum data buffer from synchronous dataflow graphs.
CASES 2005: 157-165 |
| 10 | EE | Hyunok Oh,
Nikil D. Dutt,
Soonhoi Ha:
Shift buffering technique for automatic code synthesis from synchronous dataflow graphs.
CODES+ISSS 2005: 51-56 |
| 9 | EE | Minyoung Kim,
Hyunok Oh,
Nikil D. Dutt,
Alexandru Nicolau,
Nalini Venkatasubramanian:
Probability Based Power Aware Error Resilient Coding.
ICDCS Workshops 2005: 307-313 |
| 8 | EE | Shivajit Mohapatra,
Radu Cornea,
Hyunok Oh,
Kyoungwoo Lee,
Minyoung Kim,
Nikil D. Dutt,
Rajesh Gupta,
Alexandru Nicolau,
Sandeep K. Shukla,
Nalini Venkatasubramanian:
A Cross-Layer Approach for Power-Performance Optimization in Distributed Mobile Systems.
IPDPS 2005 |
| 2004 |
|---|
| 7 | EE | Hyunok Oh,
Soonhoi Ha:
Fractional Rate Dataflow Model for Efficient Code Synthesis.
VLSI Signal Processing 37(1): 41-51 (2004) |
| 2002 |
|---|
| 6 | EE | Hyunok Oh,
Soonhoi Ha:
Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints.
CODES 2002: 133-138 |
| 5 | EE | Hyunok Oh,
Soonhoi Ha:
Efficient code synthesis from extended dataflow graphs for multimedia applications.
DAC 2002: 275-280 |
| 4 | EE | Hyunok Oh,
Soonhoi Ha:
Fractional rate dataflow model and efficient code synthesis for multimedia applications.
LCTES-SCOPES 2002: 12-17 |
| 2000 |
|---|
| 3 | EE | Hyunok Oh,
Soonhoi Ha:
Data memory minimization by sharing large size buffers.
ASP-DAC 2000: 491-496 |
| 1999 |
|---|
| 2 | EE | Hyunok Oh,
Soonhoi Ha:
A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling.
CODES 1999: 183-187 |
| 1996 |
|---|
| 1 | | Hyunok Oh,
Soonhoi Ha:
A Static Scheduling Heuristic for Heterogeneous Processors.
Euro-Par, Vol. II 1996: 573-577 |
