Hyunok Oh

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14EEHyunok Oh: Constant Rate Dataflow Model with Intermediate Ports for Efficient Code Synthesis with Top-Down Design and Dynamic Behavior. ISQED 2008: 190-193
13EEHyunok Oh, Nikil Dutt, Soonhoi Ha: Memory optimal single appearance schedule with dynamic loop count for synchronous dataflow graphs. ASP-DAC 2006: 497-502
12EEMinyoung Kim, Hyunok Oh, Nikil Dutt, Alex Nicolau, Nalini Venkatasubramanian: PBPAIR: an energy-efficient error-resilient encoding using probability based power aware intra refresh. Mobile Computing and Communications Review 10(3): 58-69 (2006)
11EEHyunok Oh, Nikil D. Dutt, Soonhoi Ha: Single appearance schedule with dynamic loop count for minimum data buffer from synchronous dataflow graphs. CASES 2005: 157-165
10EEHyunok Oh, Nikil D. Dutt, Soonhoi Ha: Shift buffering technique for automatic code synthesis from synchronous dataflow graphs. CODES+ISSS 2005: 51-56
9EEMinyoung Kim, Hyunok Oh, Nikil D. Dutt, Alexandru Nicolau, Nalini Venkatasubramanian: Probability Based Power Aware Error Resilient Coding. ICDCS Workshops 2005: 307-313
8EEShivajit Mohapatra, Radu Cornea, Hyunok Oh, Kyoungwoo Lee, Minyoung Kim, Nikil D. Dutt, Rajesh Gupta, Alexandru Nicolau, Sandeep K. Shukla, Nalini Venkatasubramanian: A Cross-Layer Approach for Power-Performance Optimization in Distributed Mobile Systems. IPDPS 2005
7EEHyunok Oh, Soonhoi Ha: Fractional Rate Dataflow Model for Efficient Code Synthesis. VLSI Signal Processing 37(1): 41-51 (2004)
6EEHyunok Oh, Soonhoi Ha: Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints. CODES 2002: 133-138
5EEHyunok Oh, Soonhoi Ha: Efficient code synthesis from extended dataflow graphs for multimedia applications. DAC 2002: 275-280
4EEHyunok Oh, Soonhoi Ha: Fractional rate dataflow model and efficient code synthesis for multimedia applications. LCTES-SCOPES 2002: 12-17
3EEHyunok Oh, Soonhoi Ha: Data memory minimization by sharing large size buffers. ASP-DAC 2000: 491-496
2EEHyunok Oh, Soonhoi Ha: A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling. CODES 1999: 183-187
1 Hyunok Oh, Soonhoi Ha: A Static Scheduling Heuristic for Heterogeneous Processors. Euro-Par, Vol. II 1996: 573-577

Coauthor Index

1Radu Cornea [8]
2Nikil D. Dutt (Nikil Dutt) [8] [9] [10] [11] [12] [13]
3Rajesh K. Gupta (Rajesh Gupta) [8]
4Soonhoi Ha [1] [2] [3] [4] [5] [6] [7] [10] [11] [13]
5Minyoung Kim [8] [9] [12]
6Kyoungwoo Lee [8]
7Shivajit Mohapatra [8]
8Alexandru Nicolau (Alex Nicolau) [8] [9] [12]
9Sandeep K. Shukla [8]
10Nalini Venkatasubramanian [8] [9] [12]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)