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Rajeev K. Ranjan

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2002
12EEDavid L. Dill, Nate James, Shishpal Rawat, Gérard Berry, Limor Fix, Harry Foster, Rajeev K. Ranjan, Gunnar Stålmarck, Curt Widdoes: Formal verification methods: getting around the brick wall. DAC 2002: 576-577
1999
11EERajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton: Using Combinational Verification for Sequential Circuits. DATE 1999: 138-144
1998
10 Thomas R. Shiple, James H. Kukula, Rajeev K. Ranjan: A Comparison of Presburger Engines for EFSM Reachability. CAV 1998: 280-292
9EEBwolen Yang, Randal E. Bryant, David R. O'Hallaron, Armin Biere, Olivier Coudert, Geert Janssen, Rajeev K. Ranjan, Fabio Somenzi: A Performance Study of BDD-Based Model Checking. FMCAD 1998: 255-289
8EERajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton: On the optimization power of retiming and resynthesis transformations. ICCAD 1998: 402-407
1997
7 Rajeev K. Ranjan, Wilsin Gosti, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Dynamic Reordering in a Breadth-First Manipulation Based BDD Package: Challenges and Solutions. ICCD 1997: 344-351
6 Amit Mehrotra, Shaz Qadeer, Rajeev K. Ranjan, Randy H. Katz: Benchmarking and Analysis of Architectures for CAD Applications. ICCD 1997: 670-675
1996
5 Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa: VIS: A System for Verification and Synthesis. CAV 1996: 428-432
4EEJagesh V. Sanghavi, Rajeev K. Ranjan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: High Performance BDD Package By Exploiting Memory Hiercharchy. DAC 1996: 635-640
3 Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa: VIS. FMCAD 1996: 248-256
2EERajeev K. Ranjan, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Binary decision diagrams on network of workstation. ICCD 1996: 358-364
1994
1EEAdnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: HSIS: A BDD-Based Environment for Formal Verification. DAC 1994: 454-459

Coauthor Index

1Adnan Aziz [1] [3] [5]
2Felice Balarin [1]
3Gérard Berry [12]
4Armin Biere [9]
5Robert K. Brayton [1] [2] [3] [4] [5] [7] [8] [11]
6Randal E. Bryant [9]
7Szu-Tsung Cheng [1] [3] [5]
8Olivier Coudert [9]
9David L. Dill [12]
10Stephen A. Edwards [3] [5]
11Limor Fix [12]
12Harry Foster [12]
13Wilsin Gosti [7]
14Gary D. Hachtel [3] [5]
15Ramin Hojati [1]
16Nate James [12]
17Geert Janssen [9]
18Timothy Kam [1]
19Randy H. Katz [6]
20Sunil P. Khatri [3] [5]
21Sriram C. Krishnan [1]
22Yuji Kukimoto [3] [5]
23James H. Kukula [10]
24Amit Mehrotra [6]
25David R. O'Hallaron [9]
26Abelardo Pardo [3] [5]
27Shaz Qadeer [3] [5] [6]
28Shishpal Rawat [12]
29Jagesh V. Sanghavi [2] [4]
30Alberto L. Sangiovanni-Vincentelli [1] [2] [3] [4] [5] [7]
31Shaker Sarwary [3] [5]
32Thomas R. Shiple [1] [3] [5] [10]
33Vigyan Singhal [1] [8] [11]
34Fabio Somenzi [3] [5] [8] [9] [11]
35Gunnar Stålmarck [12]
36Gitanjali Swamy [3] [5]
37Serdar Tasiran [1]
38Tiziano Villa [3] [5]
39Huey-Yih Wang [1]
40Curt Widdoes [12]
41Bwolen Yang [9]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)