2008 |
23 | EE | Tarek Moselhy,
Luca Daniel:
Stochastic integral equation solver for efficient variation-aware interconnect extraction.
DAC 2008: 415-420 |
22 | EE | Tarek A. El-Moselhy,
Ibrahim M. Elfadel,
Luca Daniel:
A capacitance solver for incremental variation-aware extraction.
ICCAD 2008: 662-669 |
21 | EE | Bradley N. Bond,
Luca Daniel:
Guaranteed stable projection-based model reduction for indefinite and unstable linear systems.
ICCAD 2008: 728-735 |
20 | EE | Kin Cheong Sou,
Alexandre Megretski,
Luca Daniel:
A Quasi-Convex Optimization Approach to Parameterized Model Order Reduction.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 456-469 (2008) |
2007 |
19 | EE | Tarek Moselhy,
Xin Hu,
Luca Daniel:
pFFT in FastMaxwell: a fast impedance extraction solver for 3D conductor structures over substrate.
DATE 2007: 1194-1199 |
18 | EE | Xin Hu,
Tarek Moselhy,
Jacob K. White,
Luca Daniel:
Optimization-based wideband basis functions for efficient interconnect extraction.
DATE 2007: 1200-1205 |
17 | EE | Bradley N. Bond,
Luca Daniel:
Stabilizing schemes for piecewise-linear reduced order models via projection and weighting functions.
ICCAD 2007: 860-866 |
16 | EE | Kin Cheong Sou,
Alexandre Megretski,
Luca Daniel:
Bounding L2 gain system error generated by approximations of the nonlinear vector field.
ICCAD 2007: 879-886 |
15 | EE | Bradley N. Bond,
Luca Daniel:
A Piecewise-Linear Moment-Matching Approach to Parameterized Model-Order Reduction for Highly Nonlinear Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2116-2129 (2007) |
2005 |
14 | EE | Xin Hu,
Jung Hoon Lee,
Jacob White,
Luca Daniel:
Analysis of full-wave conductor system impedance over substrate using novel integration techniques.
DAC 2005: 147-152 |
13 | EE | Kin Cheong Sou,
Alexandre Megretski,
Luca Daniel:
A quasi-convex optimization approach to parameterized model order reduction.
DAC 2005: 933-938 |
12 | EE | Thomas J. Klemas,
Luca Daniel,
Jacob K. White:
Segregation by primary phase factors: a full-wave algorithm for model order reduction.
DAC 2005: 943-946 |
11 | | Bradley N. Bond,
Luca Daniel:
Parameterized model order reduction of nonlinear dynamical systems.
ICCAD 2005: 487-494 |
10 | EE | Anirudh Devgan,
Luca Daniel,
Byron Krauter,
Lei He:
Modeling and Design of Chip-Package Interface.
ISQED 2005: 6 |
2004 |
9 | EE | Luca Daniel,
Ong Chin Siong,
Sok Chay Low,
Kwok Hong Lee,
Jacob K. White:
A multiparameter moment-matching model-reduction approach for generating geometrically parameterized interconnect performance models.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 678-693 (2004) |
2003 |
8 | EE | Alessandra Nardi,
Haibo Zeng,
Joshua L. Garrett,
Luca Daniel,
Alberto L. Sangiovanni-Vincentelli:
A Methodology for the Computation of an Upper Bound on Nose Current Spectrum of CMOS Switching Activity.
ICCAD 2003: 778-785 |
7 | EE | Joel R. Phillips,
Luca Daniel,
Luis Miguel Silveira:
Guaranteed passive balancing transformations for model order reduction.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(8): 1027-1041 (2003) |
2002 |
6 | EE | Luca Daniel,
Joel R. Phillips:
Model order reduction for strictly passive and causal distributed systems.
DAC 2002: 46-51 |
5 | EE | Joel R. Phillips,
Luca Daniel,
Luis Miguel Silveira:
Guaranteed passive balancing transformations for model order reduction.
DAC 2002: 52-57 |
4 | EE | Luca Daniel,
Alberto L. Sangiovanni-Vincentelli,
Jacob White:
Proximity templates for modeling of skin and proximity effects on packages and high frequency interconnect.
ICCAD 2002: 326-333 |
3 | EE | Luca Daniel,
Chin Siong Ong,
Sok Chay Low,
Kwok Hong Lee,
Jacob White:
Geometrically parameterized interconnect performance models for interconnect synthesis.
ISPD 2002: 202-207 |
2001 |
2 | EE | Luca Daniel,
Alberto L. Sangiovanni-Vincentelli,
Jacob White:
Using Conduction Modes Basis Functions for Efficient Electromagnetic Analysis of On-Chip and Off-Chip Interconnect.
DAC 2001: 563-566 |
1 | EE | Luca Daniel,
Alberto L. Sangiovanni-Vincentelli,
Jacob White:
Techniques for Including Dielectrics when Extracting Passive Low-Order Models of High Speed Interconnect.
ICCAD 2001: 240-244 |