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Roberto Zafalon

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2006
22EEEnrico Macii, Massoud Pedram, Dirk Friebel, Robert C. Aitken, Antun Domic, Roberto Zafalon: Low-power design tools: are EDA vendors taking this matter seriously? DATE 2006: 1227
21EELabros Bisdounis, Spyros Blionas, Enrico Macii, Spiridon Nikolaidis, Roberto Zafalon: Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications. J. Low Power Electronics 2(1): 18-26 (2006)
2005
20EEDomenico Barretta, Gianluca Palermo, Mariagiovanna Sami, Roberto Zafalon: Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor. CAMP 2005: 265-270
19EELabros Bisdounis, Spyros Blionas, Enrico Macii, Spiridon Nikolaidis, Roberto Zafalon: Energy-Aware System-on-Chip for 5 GHz Wireless LANs. PATMOS 2005: 166-176
18EEMatteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Low-power branch prediction techniques for VLIW architectures: a compiler-hints based approach. Integration 38(3): 515-524 (2005)
2004
17EEMatteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors. ACM Great Lakes Symposium on VLSI 2004: 440-443
16EEAndrea Bona, Vittorio Zaccaria, Roberto Zafalon: System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip. DATE 2004: 318-323
15EEMirko Loghi, Federico Angiolini, Davide Bertozzi, Luca Benini, Roberto Zafalon: Analyzing On-Chip Communication in a MPSoC Environment. DATE 2004: 752-757
14EEAndrea Bona, Vittorio Zaccaria, Roberto Zafalon: Low Effort, High Accuracy Network-on-Chip Power Macro Modeling. PATMOS 2004: 541-552
2003
13EEGianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Branch prediction techniques for low-power VLIW processors. ACM Great Lakes Symposium on VLSI 2003: 225-228
12EEAlberto Macii, Enrico Macii, Fabrizio Crudo, Roberto Zafalon: A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors. DATE 2003: 10024-10029
11 Lorenzo Salvemini, Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems. SAC 2003: 672-678
2002
10EEAndrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon: Energy estimation and optimization of embedded VLIW processors based on instruction clustering. DAC 2002: 886-891
9EEAndrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon: An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores. DATE 2002: 1128
8EEMariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Low-power data forwarding for VLIW embedded architectures. IEEE Trans. VLSI Syst. 10(5): 614-622 (2002)
2001
7EEMariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Exploiting data forwarding to reduce the power budget of VLIW embedded processors. DATE 2001: 252-257
6EERob A. Rutenbar, L. Richard Carley, Roberto Zafalon, Nicola Dragone: Low-power technology mapping for mixed-swing logic. ISLPED 2001: 291-294
2000
5EERoberto Zafalon, Massimo Rossello, Enrico Macii, Massimo Poncino: Power Macromodeling for a High Quality RT-Level Power Estimation. ISQED 2000: 59-
4EEManuela Anton, Mauro Chinosi, Daniele Sirtori, Roberto Zafalon: Architectural Design Space Exploration Achieved through Innovative RTL Power Estimation Techniques. PATMOS 2000: 3-13
1999
3EEMauro Chinosi, Roberto Zafalon, Carlo Guardiani: Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning. DAC 1999: 562-567
1998
2EEMauro Chinosi, Roberto Zafalon, Carlo Guardiani: Automatic characterization and modeling of power consumption in static RAMs. ISLPED 1998: 112-114
1EENicola Dragone, Roberto Zafalon, Carlo Guardiani, Cristina Silvano: Power invariant vector compaction based on bit clustering and temporal partitioning. ISLPED 1998: 118-120

Coauthor Index

1Robert C. Aitken [22]
2Federico Angiolini [15]
3Manuela Anton [4]
4Domenico Barretta [20]
5Luca Benini [15]
6Davide Bertozzi [15]
7Labros Bisdounis [19] [21]
8Spyros Blionas [19] [21]
9Andrea Bona [9] [10] [14] [16]
10L. Richard Carley [6]
11Mauro Chinosi [2] [3] [4]
12Fabrizio Crudo [12]
13Antun Domic [22]
14Nicola Dragone [1] [6]
15Dirk Friebel [22]
16Carlo Guardiani [1] [2] [3]
17Mirko Loghi [15]
18Alberto Macii [12]
19Enrico Macii [5] [12] [19] [21] [22]
20Matteo Monchiero [17] [18]
21Spiridon Nikolaidis [19] [21]
22Gianluca Palermo [13] [17] [18] [20]
23Massoud Pedram [22]
24Massimo Poncino [5]
25Massimo Rossello [5]
26Rob A. Rutenbar [6]
27Lorenzo Salvemini [11]
28Mariagiovanna Sami [7] [8] [9] [10] [11] [13] [17] [18] [20]
29Donatella Sciuto [7] [8] [9] [10] [11]
30Cristina Silvano [1] [7] [8] [9] [10] [11] [13] [17] [18]
31Daniele Sirtori [4]
32Vittorio Zaccaria [7] [8] [9] [10] [11] [13] [14] [16] [17] [18]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)