2006 |
22 | EE | Enrico Macii,
Massoud Pedram,
Dirk Friebel,
Robert C. Aitken,
Antun Domic,
Roberto Zafalon:
Low-power design tools: are EDA vendors taking this matter seriously?
DATE 2006: 1227 |
21 | EE | Labros Bisdounis,
Spyros Blionas,
Enrico Macii,
Spiridon Nikolaidis,
Roberto Zafalon:
Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications.
J. Low Power Electronics 2(1): 18-26 (2006) |
2005 |
20 | EE | Domenico Barretta,
Gianluca Palermo,
Mariagiovanna Sami,
Roberto Zafalon:
Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor.
CAMP 2005: 265-270 |
19 | EE | Labros Bisdounis,
Spyros Blionas,
Enrico Macii,
Spiridon Nikolaidis,
Roberto Zafalon:
Energy-Aware System-on-Chip for 5 GHz Wireless LANs.
PATMOS 2005: 166-176 |
18 | EE | Matteo Monchiero,
Gianluca Palermo,
Mariagiovanna Sami,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
Low-power branch prediction techniques for VLIW architectures: a compiler-hints based approach.
Integration 38(3): 515-524 (2005) |
2004 |
17 | EE | Matteo Monchiero,
Gianluca Palermo,
Mariagiovanna Sami,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors.
ACM Great Lakes Symposium on VLSI 2004: 440-443 |
16 | EE | Andrea Bona,
Vittorio Zaccaria,
Roberto Zafalon:
System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip.
DATE 2004: 318-323 |
15 | EE | Mirko Loghi,
Federico Angiolini,
Davide Bertozzi,
Luca Benini,
Roberto Zafalon:
Analyzing On-Chip Communication in a MPSoC Environment.
DATE 2004: 752-757 |
14 | EE | Andrea Bona,
Vittorio Zaccaria,
Roberto Zafalon:
Low Effort, High Accuracy Network-on-Chip Power Macro Modeling.
PATMOS 2004: 541-552 |
2003 |
13 | EE | Gianluca Palermo,
Mariagiovanna Sami,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
Branch prediction techniques for low-power VLIW processors.
ACM Great Lakes Symposium on VLSI 2003: 225-228 |
12 | EE | Alberto Macii,
Enrico Macii,
Fabrizio Crudo,
Roberto Zafalon:
A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors.
DATE 2003: 10024-10029 |
11 | | Lorenzo Salvemini,
Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems.
SAC 2003: 672-678 |
2002 |
10 | EE | Andrea Bona,
Mariagiovanna Sami,
Donatella Sciuto,
Vittorio Zaccaria,
Cristina Silvano,
Roberto Zafalon:
Energy estimation and optimization of embedded VLIW processors based on instruction clustering.
DAC 2002: 886-891 |
9 | EE | Andrea Bona,
Mariagiovanna Sami,
Donatella Sciuto,
Vittorio Zaccaria,
Cristina Silvano,
Roberto Zafalon:
An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores.
DATE 2002: 1128 |
8 | EE | Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
Low-power data forwarding for VLIW embedded architectures.
IEEE Trans. VLSI Syst. 10(5): 614-622 (2002) |
2001 |
7 | EE | Mariagiovanna Sami,
Donatella Sciuto,
Cristina Silvano,
Vittorio Zaccaria,
Roberto Zafalon:
Exploiting data forwarding to reduce the power budget of VLIW embedded processors.
DATE 2001: 252-257 |
6 | EE | Rob A. Rutenbar,
L. Richard Carley,
Roberto Zafalon,
Nicola Dragone:
Low-power technology mapping for mixed-swing logic.
ISLPED 2001: 291-294 |
2000 |
5 | EE | Roberto Zafalon,
Massimo Rossello,
Enrico Macii,
Massimo Poncino:
Power Macromodeling for a High Quality RT-Level Power Estimation.
ISQED 2000: 59- |
4 | EE | Manuela Anton,
Mauro Chinosi,
Daniele Sirtori,
Roberto Zafalon:
Architectural Design Space Exploration Achieved through Innovative RTL Power Estimation Techniques.
PATMOS 2000: 3-13 |
1999 |
3 | EE | Mauro Chinosi,
Roberto Zafalon,
Carlo Guardiani:
Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning.
DAC 1999: 562-567 |
1998 |
2 | EE | Mauro Chinosi,
Roberto Zafalon,
Carlo Guardiani:
Automatic characterization and modeling of power consumption in static RAMs.
ISLPED 1998: 112-114 |
1 | EE | Nicola Dragone,
Roberto Zafalon,
Carlo Guardiani,
Cristina Silvano:
Power invariant vector compaction based on bit clustering and temporal partitioning.
ISLPED 1998: 118-120 |