| 2002 |
|---|
| 11 | EE | Cho W. Moon,
Harish Kriplani,
Krishna P. Belkhale:
Timing model extraction of hierarchical blocks by graph reduction.
DAC 2002: 152-157 |
| 1999 |
|---|
| 10 | EE | Sumit Roy,
Krishna P. Belkhale,
Prithviraj Banerjee:
An Approxmimate Algorithm for Delay-Constraint Technology Mapping.
DAC 1999: 367-372 |
| 1995 |
|---|
| 9 | EE | Krishna P. Belkhale,
Alexander J. Suess:
Timing analysis with known false sub graphs.
ICCAD 1995: 736-740 |
| 1993 |
|---|
| 8 | EE | Krishna P. Belkhale,
Randall J. Brouwer,
Prithviraj Banerjee:
Task scheduling for exploiting parallelism and hierarchy in VLSI CAD algorithms.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(5): 557-567 (1993) |
| 1992 |
|---|
| 7 | | Krishna P. Belkhale,
Prithviraj Banerjee:
Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach.
IEEE Trans. Computers 41(1): 83-96 (1992) |
| 6 | | Krishna P. Belkhale,
Prithviraj Banerjee:
Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor.
IEEE Trans. Computers 41(6): 699-709 (1992) |
| 1991 |
|---|
| 5 | | Krishna P. Belkhale,
Prithviraj Banerjee:
A Scheduling Algorithm for Parallelizable Dependent Tasks.
IPPS 1991: 500-506 |
| 4 | EE | Krishna P. Belkhale,
Prithviraj Banerjee:
Parallel algorithms for VLSI circuit extraction.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 604-618 (1991) |
| 1990 |
|---|
| 3 | | Krishna P. Belkhale,
Prithviraj Banerjee:
A Parallel Algorithm for Hierarchical Circuit Extraction.
ICCAD 1990: 236-239 |
| 2 | | Krishna P. Belkhale,
Prithviraj Banerjee:
An Approximate Algorithm for the Partitionable Independent Task Scheduling Problem.
ICPP (1) 1990: 72-75 |
| 1 | | Krishna P. Belkhale,
Prithviraj Banerjee:
Geometric Connected Component Labeling on Distributed Memory Multicomputers.
ICPP (3) 1990: 291-294 |
