2009 | ||
---|---|---|
45 | EE | Willy M. C. Sansen: Analog IC Design in Nanometer CMOS Technologies. VLSI Design 2009: 4 |
2007 | ||
44 | EE | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen: An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. DATE 2007: 81-86 |
2006 | ||
43 | EE | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen: Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. DAC 2006: 25-30 |
42 | EE | Raf Schoofs, Michiel Steyaert, Willy M. C. Sansen: A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications. ISCAS 2006 |
2003 | ||
41 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Time-Varying, Frequency-Domain Modeling and Analysis of Phase-Locked Loops with Sampling Phase-Frequency Detectors. DATE 2003: 10238-10243 |
40 | EE | Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Generalized Posynomial Performance Modeling. DATE 2003: 10250-10255 |
39 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: A Generalized Method for Computing Oscillator Phase Noise Spectra. ICCAD 2003: 247-250 |
38 | EE | Manuel Innocent, Piet Wambacq, Stéphane Donnay, Harrie A. C. Tilmans, Willy M. C. Sansen, Hugo De Man: An analytic Volterra-series-based model for a MEMS variable capacitor. IEEE Trans. on CAD of Integrated Circuits and Systems 22(2): 124-131 (2003) |
37 | EE | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 517-534 (2003) |
36 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Behavioral modeling of (coupled) harmonic oscillators. IEEE Trans. on CAD of Integrated Circuits and Systems 22(8): 1017-1026 (2003) |
2002 | ||
35 | EE | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits. DAC 2002: 431-436 |
34 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Behavioral modeling of (coupled) harmonic oscillators. DAC 2002: 536-541 |
33 | EE | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics. DATE 2002: 268-273 |
32 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Constructing Symbolic Models for the Input/Output Behavior of Periodically Time-Varying Systems Using Harmonic Transfer Matrices. DATE 2002: 279-284 |
31 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: On the difference between two widely publicized methods for analyzing oscillator phase behavior. ICCAD 2002: 229-233 |
30 | EE | Francky Leyn, Erik Lauwers, Martin Vogels, Georges G. E. Gielen, Willy M. C. Sansen: Regression criteria and their application in different modeling cases. ISCAS (5) 2002: 85-8 |
29 | EE | Carl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: CYCLONE: automated design and layout of RF LC-oscillators. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1161-1170 (2002) |
28 | EE | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Circuit simplification for the symbolic analysis of analogintegrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 395-407 (2002) |
27 | EE | Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen: A layout synthesis methodology for array-type analog blocks. IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 645-661 (2002) |
26 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Symbolic modeling of periodically time-varying systems usingharmonic transfer matrices. IEEE Trans. on CAD of Integrated Circuits and Systems 21(9): 1011-1024 (2002) |
2001 | ||
25 | EE | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Efficient time-domain simulation of telecom frontends using a complex damped exponential signal model. DATE 2001: 169-175 |
24 | EE | Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: A Layout-Aware Synthesis Methodology for RF Circuits. ICCAD 2001: 358- |
23 | EE | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing. ICCAD 2001: 70-74 |
22 | EE | Geert Van der Plas, Geert Debyser, Francky Leyn, Koen Lampaert, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen, Petar Veselinovic, Domine Leenaerts: AMGIE-A synthesis environment for CMOS analog integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1037-1058 (2001) |
2000 | ||
21 | EE | Carl De Ranter, B. De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: CYCLONE: automated design and layout of RF LC-oscillators. DAC 2000: 11-14 |
20 | EE | Geert Van der Plas, Jan Vandenbussche, Walter Daems, Antal van den Bosch, Georges G. E. Gielen, Willy M. C. Sansen: Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter. DAC 2000: 452-457 |
1999 | ||
19 | EE | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits. DAC 1999: 958-963 |
1998 | ||
18 | EE | Jan Vandenbussche, Stéphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen: Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. DATE 1998: 716-720 |
17 | EE | Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen: An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits. ICCAD 1998: 304-307 |
16 | EE | Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen: Probabilistic fault detection and the selection of measurements for analog integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 862-872 (1998) |
15 | EE | A. Marques, Michiel Steyaert, Willy M. C. Sansen: Theory of PLL fractional-N frequency synthesizers. Wireless Networks 4(1): 79-85 (1998) |
1997 | ||
14 | EE | Stéphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts, W. van Bokhoven: High-level synthesis of analog sensor interface front-ends. ED&TC 1997: 56-60 |
13 | EE | Francky Leyn, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. ICCAD 1997: 374-381 |
1996 | ||
12 | EE | L. Richard Carley, Georges G. E. Gielen, Rob A. Rutenbar, Willy M. C. Sansen: Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies. DAC 1996: 298-303 |
1995 | ||
11 | EE | Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen: Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits. DAC 1995: 445-449 |
10 | Georges G. E. Gielen, Geert Debyser, Piet Wambacq, Koen Swings, Willy M. C. Sansen: Use of Symbolic Analysis in Analog Circuit Synthesis. ISCAS 1995: 2205-2208 | |
1994 | ||
9 | Stéphane Donnay, Koen Swings, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts: A Methodology for Analog Design Automation in Mixed-Signal ASICs. EDAC-ETC-EUROASIC 1994: 530-534 | |
8 | EE | Georges G. E. Gielen, Zhihua Wang, Willy M. C. Sansen: Fault detection and input stimulus determination for the testing of analog integrated circuits based on power-supply current monitoring. ICCAD 1994: 495-498 |
7 | Francisco V. Fernández, Piet Wambacq, Georges G. E. Gielen, Ángel Rodríguez-Vázquez, Willy M. C. Sansen: Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation. ISCAS 1994: 25-28 | |
6 | Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen: A Novel Method for the Fault Detection of Analog Integrated Circuits. ISCAS 1994: 347-350 | |
5 | Francisco V. Fernández, Georges G. E. Gielen, Lawrence Huelsman, Agnieszka Konczykowska, Stefano Manetti, Willy M. C. Sansen, Jiri Vlach: Pleasures, Perils and Pitfalls of Symbolic Analysis. ISCAS 1994: 451-457 | |
1993 | ||
4 | Georges G. E. Gielen, Willy M. C. Sansen: Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation. ISCAS 1993: 1381-1384 | |
3 | Michiel Steyaert, Jan Crols, S. Gogaert, Willy M. C. Sansen: Low-voltage Analog CMOS Filter Design. ISCAS 1993: 1447-1450 | |
1990 | ||
2 | EE | Georges G. E. Gielen, Koen Swings, Willy M. C. Sansen: An intelligent design system for analogue integrated circuits. EURO-DAC 1990: 169-173 |
1989 | ||
1 | EE | Paul J. V. Vandeloo, Willy M. C. Sansen: Modeling of the MOS transistor for high frequency analog design. IEEE Trans. on CAD of Integrated Circuits and Systems 8(7): 713-723 (1989) |