2008 |
24 | EE | Sambuddha Bhattacharya,
Shabbir H. Batterywala,
Subramanian Rajagopalan,
Hi-Keung Tony Ma,
Narendra V. Shenoy:
On Efficient and Robust Constraint Generation for Practical Layout Legalization.
ISQED 2008: 379-384 |
23 | EE | Shabbir H. Batterywala,
Sambuddha Bhattacharya,
Subramanian Rajagopalan,
Hi-Keung Tony Ma,
Narendra V. Shenoy:
Cell Swapping Based Migration Methodology for Analog and Custom Layouts.
ISQED 2008: 450-455 |
2005 |
22 | EE | Eduard Cerny,
Ashvin Dsouza,
Kevin Harer,
Pei-Hsin Ho,
Hi-Keung Tony Ma:
Supporting sequential assumptions in hybrid verification.
ASP-DAC 2005: 1035-1038 |
2002 |
21 | EE | Demos Anastasakis,
Robert F. Damiano,
Hi-Keung Tony Ma,
Ted Stanion:
A practical and efficient method for compare-point matching.
DAC 2002: 305-310 |
2001 |
20 | EE | Dong Wang,
Pei-Hsin Ho,
Jiang Long,
James H. Kukula,
Yunshan Zhu,
Hi-Keung Tony Ma,
Robert F. Damiano:
Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines.
DAC 2001: 35-40 |
1999 |
19 | EE | Narendra V. Shenoy,
Mahesh A. Iyer,
Robert F. Damiano,
Kevin Harer,
Hi-Keung Tony Ma,
Paul Thilking:
A Robust Solution to the Timing Convergence Problem in High-Performance Design.
ICCD 1999: 250-257 |
1993 |
18 | EE | Kwang-Ting Cheng,
Hi-Keung Tony Ma:
On the over-specification problem in sequential ATPG algorithms.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1599-1604 (1993) |
1992 |
17 | EE | Kwang-Ting Cheng,
Hi-Keung Tony Ma:
On the Over-Specification Problem in Sequential ATPG Algorithms.
DAC 1992: 16-21 |
1990 |
16 | EE | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton,
Alberto L. Sangiovanni-Vincentelli:
Irredundant sequential machines via optimal logic synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(1): 8-18 (1990) |
15 | EE | Srinivas Devadas,
Hi-Keung Tony Ma:
Easily testable PLA-based finite state machines.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(6): 604-611 (1990) |
14 | EE | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton:
Redundancies and don't cares in sequential logic synthesis.
J. Electronic Testing 1(1): 15-30 (1990) |
1989 |
13 | | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton:
Redundancies and Don't Cares in Sequential Logic Synthesis.
ITC 1989: 491-500 |
12 | EE | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton,
Alberto L. Sangiovanni-Vincentelli:
A synthesis and optimization procedure for fully and easily testable sequential machines.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(10): 1100-1107 (1989) |
11 | EE | Hi-Keung Tony Ma,
Srinivas Devadas,
Ruey-Sing Wei,
Alberto L. Sangiovanni-Vincentelli:
Logic verification algorithms and their parallel implementation.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(2): 181-189 (1989) |
1988 |
10 | | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton,
Alberto L. Sangiovanni-Vincentelli:
Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines.
ITC 1988: 621-630 |
9 | | Hi-Keung Tony Ma,
A. Richard Newton,
Srinivas Devadas,
Alberto L. Sangiovanni-Vincentelli:
An Incomplete Scan Design Approach to Test Generation for Sequential Machines.
ITC 1988: 730-734 |
8 | EE | Hi-Keung Tony Ma,
Srinivas Devadas,
A. Richard Newton,
Alberto L. Sangiovanni-Vincentelli:
Test generation for sequential circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(10): 1081-1093 (1988) |
7 | EE | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton,
Alberto L. Sangiovanni-Vincentelli:
MUSTANG: state assignment of finite state machines targeting multilevel logic implementations.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(12): 1290-1300 (1988) |
6 | EE | Douglas Braun,
Jeffrey L. Burns,
Fabio Romeo,
Alberto L. Sangiovanni-Vincentelli,
Kartikeya Mayaram,
Srinivas Devadas,
Hi-Keung Tony Ma:
Techniques for multilayer channel routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 698-712 (1988) |
5 | EE | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton:
On the verification of sequential machines at differing levels of abstraction.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 713-722 (1988) |
1987 |
4 | EE | Srinivas Devadas,
Hi-Keung Tony Ma,
A. Richard Newton:
On the Verification of Sequential Machines at Differing Levels of Abstraction.
DAC 1987: 271-276 |
3 | EE | Hi-Keung Tony Ma,
Srinivas Devadas,
Alberto L. Sangiovanni-Vincentelli,
R. Wei:
Logic Verification Algorithms and Their Parallel Implementation.
DAC 1987: 283-290 |
1986 |
2 | EE | Douglas Braun,
Jeffrey L. Burns,
Srinivas Devadas,
Hi-Keung Tony Ma,
Kartikeya Mayaram,
Fabio Romeo,
Alberto L. Sangiovanni-Vincentelli:
Chameleon: a new multi-layer channel router.
DAC 1986: 495-502 |
1 | EE | Hi-Keung Tony Ma,
Alberto L. Sangiovanni-Vincentelli:
Mixed-level fault coverage estimation.
DAC 1986: 553-559 |