DATE 1999:
Munich,
Germany
1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany.
IEEE Computer Society 1999, ISBN 0-7695-0078-1 BibTeX
@proceedings{DBLP:conf/date/1999,
title = {1999 Design, Automation and Test in Europe (DATE '99), 9-12 March
1999, Munich, Germany},
booktitle = {DATE},
publisher = {IEEE Computer Society},
year = {1999},
isbn = {0-7695-0078-1},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Embedded System Design - The European Technology Driver
Verification of Sequential Circuits
Architectural Issues in Low Power Design
Design Reuse Repository and IP Architecture
High Level Verification
System-Level Power Optimization
Reconfigurability and Other Issues in Embedded System Design
Embedded Core Test Approaches
Use of Combinational Verification
- Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell:
An Efficient Filter-Based Approach for Combinational Verification.
132-137
Electronic Edition (link) BibTeX
- Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton:
Using Combinational Verification for Sequential Circuits.
138-144
Electronic Edition (link) BibTeX
- João P. Marques Silva, Thomas Glass:
Combinational Equivalence Checking Using Satisfiability and Recursive Learning.
145-149
Electronic Edition (link) BibTeX
- Stefan Hendricx, Luc J. M. Claesen:
Formally Verified Redundancy Removal.
150-
Electronic Edition (link) BibTeX
Gate Level Power Estimation and Optimization
Fault Diagnosis Techniques for Analogue Circuits
Resource Sharing in Architectural Synthesis
Mixed Signal Characterization and Test
- A. Lechner, J. Ferguson, Andrew Richardson, B. Hermes:
A Digital Partial Built-In Self-Test for a High Performance Automatic Gain Control Circuit .
232-238
Electronic Edition (link) BibTeX
- Laurent Latorre, Yves Bertrand, P. Hazard, F. Pressecq, Pascal Nouet:
Design, Characterization & Modelling of a CMOS Magnetic Field Sensor.
239-243
Electronic Edition (link) BibTeX
- Zheng Rong Yang, Mark Zwolinski:
Fast, Robust DC and Transient Fault Simulation for Nonlinear Analog Circuits.
244-248
Electronic Edition (link) BibTeX
- Franc Novak, Bojan Hvala, Sandi Klavzar:
On Analog Signature Analysis.
249-
Electronic Edition (link) BibTeX
System Design Methodologies:
Modelling,
Analysis,
Refinement and Synthesis
High Level Test Synthesis
High-Level System Simulation
Analogue Circuit Sizing and Synthesis
VHDL-AMS and HDL Interoperability
Transistor Level Test
Hot Topic - Hardware Synthesis from C/C++ Models
Analogue Modelling and Simulation
Hot Topic - Chip Package Co-Design
Panel:
Scaling Towards Nanometer Technologies:
Design for Test Challenges
Functional Verification
Bit-Level Logic and Analogue Simulation
Partial and Boundary Scan Test
New Languages for System Specification and Design
Circuit Analysis and Design
Logic Synthesis
- Enrique San Millán, Luis Entrena, José Alberto Espejo, Silvia Chiusano, Fulvio Corno:
Integrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization.
516-520
Electronic Edition (link) BibTeX
- Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas:
An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length.
521-525
Electronic Edition (link) BibTeX
- Luís Guerra e Silva, Luis Miguel Silveira, João P. Marques Silva:
Algorithms for Solving Boolean Satisfiability in Combinational Circuits.
526-530
Electronic Edition (link) BibTeX
- Leon Stok, Andrew J. Sullivan, Mahesh A. Iyer:
Wavefront Technology Mapping.
531-
Electronic Edition (link) BibTeX
IDDX Testing and Defect Modelling
HW/SW Interface Synthesis and Partitioning
Physical Design Issues
Reliability and Symmetry in Architectural Synthesis
Panel - Single Chip or Hybrid System Integration?
Testing Regular Structures and Delay Faults
Retiming
Modelling of Interconnects
Design Reuse Methodologies for Virtual Components and IP
Embedded Tutorial - Multilanguage System Design
RAM BIST
Panel - Java,
VHDL-AMS,
Ada or C for System Level Specifications?
Hot Topic - IP and Reuse
Special Session-Large European Programs in Microelectronic System and Circuit Design
Sequential Circuit Test Generation
Posters
- Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero:
Approximate Equivalence Verification of Sequential Circuits via Genetic Algorithms.
754-755
Electronic Edition (link) BibTeX
- Karsten Strehl, Lothar Thiele:
Interval Diagram Techniques for Symbolic Model Checking of Petri Nets.
756-757
Electronic Edition (link) BibTeX
- Mitchell A. Thornton, J. P. Williams, Rolf Drechsler, Nicole Drechsler:
Variable Reordering for Shared Binary Decision Diagrams Using Output Probabilities.
758-759
Electronic Edition (link) BibTeX
- Christoph Meinel, Christian Stangier:
Increasing Efficiency of Symbolic Model Checking by Accelerating Dynamic Variable Reordering.
760-761
Electronic Edition (link) BibTeX
- William Fornaciari, Donatella Sciuto, Cristina Silvano:
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems.
762-763
Electronic Edition (link) BibTeX
- Karlheinz Weiß, Thorsten Steckstor, Wolfgang Rosenstiel:
Emulation of a Fast Reactive Embedded System using a Real Time Operating System.
764-765
Electronic Edition (link) BibTeX
- J. A. Maestro, Daniel Mozos, Román Hermida:
The Heterogeneous Structure Problem in Hardware/Software Codesign: A Macroscopic Approach.
766-767
Electronic Edition (link) BibTeX
- Josef Fleischmann, Klaus Buchenrieder, Rainer Kress:
Codesign of Embedded Systems Based on Java and Reconfigurable Hardware Components.
768-769
Electronic Edition (link) BibTeX
- A. Maamar, G. Russell:
ADOLT - An ADaptable On - Line Testing Scheme for VLSI Circuits.
770-771
Electronic Edition (link) BibTeX
- Krzysztof Kuchcinski:
Integrated Resource Assignment and Scheduling of Task Graphs Using Finite Domain Constraints.
772-773
Electronic Edition (link) BibTeX
- Christos A. Papachristou, Yusuf Alzazeri:
A Method of Distributed Controller Design for RTL Circuits.
774-775
Electronic Edition (link) BibTeX
- Jung Hyun Choi, Sergio Bampi:
OTA Amplifiers Design on Digital Sea-of-Transistors Array.
776-777
Electronic Edition (link) BibTeX
- Cesare Alippi, William Fornaciari, Laura Pozzi, Mariagiovanna Sami:
A DAG-Based Design Approach for Reconfigurable VLIW Processors.
778-779
Electronic Edition (link) BibTeX
- Jue Wu, Gary S. Greenstein, Elizabeth M. Rudnick:
A Fault List Reduction Approach for Efficient Bridge Fault Diagnosis.
780-781
Electronic Edition (link) BibTeX
- Olivier Pasquier, Jean Paul Calvez:
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems.
782-783
Electronic Edition (link) BibTeX
- Stefan Scherber, Christian Müller-Schloer:
An Efficient and Flexible Methodology for Modelling and Simulation of Heterogeneous Mechatronic Systems.
784-785
Electronic Edition (link) BibTeX
- Peter M. Maurer, William J. Schilp:
Software Bit-Slicing: A Technique for Improving Simulation Performance.
786-787
Electronic Edition (link) BibTeX
- Françoise Martinolle, Charles Dawson, Debra Corlette, Mike Floyd:
Interoperability of Verilog/VHDL Procedural Language Interfaces to Build a Mixed Language GUI.
788-789
Electronic Edition (link) BibTeX
- Jerzy Dabrowski, Andrzej Pulka:
Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL Technique.
790-791
Electronic Edition (link) BibTeX
- Iyad Rayane, Jaime Velasco-Medina, Michael Nicolaidis:
A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection.
792-
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:05:45 2009
by Michael Ley (ley@uni-trier.de)
