2008 |
9 | EE | J. S. Hobbs,
T. W. Williams:
Reaching the limits of low power design.
ASP-DAC 2008: 732-735 |
2000 |
8 | EE | T. W. Williams,
Stephen K. Sunter:
How Should Fault Coverage Be Defined?
VTS 2000: 325-328 |
1999 |
7 | EE | T. W. Williams:
Testing in Nanometer Technologies.
DATE 1999: 5- |
6 | | T. W. Williams:
IEEE-USA and the Issue of Member Choice.
IEEE Computer 32(2): 123-124 (1999) |
1998 |
5 | EE | Petra Nordholz,
Hartmut Grabinski,
Dieter Treytnar,
Jan Otterstedt,
Dirk Niggemeyer,
Uwe Arz,
T. W. Williams:
Core Interconnect Testing Hazards.
DATE 1998: 953-954 |
4 | EE | J. C. Marshall,
L. A. Ankeny,
S. P. Clancy,
J. H. Hall,
J. H. Heiken,
K. S. Holian,
Stephen R. Lee,
G. R. McNamara,
J. W. Painter,
M. E. Zander,
Julian Cummings,
Scott Haney,
Steve Karmesin,
William Humphrey,
John Reynders,
T. W. Williams,
R. L. Graham:
Tecolote: An Object-Oriented Framework for Physics Development.
ECOOP Workshops 1998: 458-459 |
3 | EE | Jan Otterstedt,
Dirk Niggemeyer,
T. W. Williams:
Detection of CMOS address decoder open faults with March and pseudo random memory tests.
ITC 1998: 53-62 |
2 | EE | Petra Nordholz,
Dieter Treytnar,
Jan Otterstedt,
Hartmut Grabinski,
Dirk Niggemeyer,
T. W. Williams:
Signal Integrity Problems in Deep Submicron Arising from Interconnects between Cores.
VTS 1998: 28-33 |
1 | | Meh-Ron Amerian,
William D. Atwell Jr.,
Ian Burgess,
Gary D. Fleeman,
David Y. Lepejian,
T. W. Williams,
Farzad Zarrinfar,
Yervant Zorian:
A D&T Roundtable: Testing Mixed Logic and DRAM Chips.
IEEE Design & Test of Computers 15(2): 86-92 (1998) |