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Peter Feldmann

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2008
29EEPeter Feldmann, Soroush Abbaspour, Debjit Sinha, Gregory Schaeffer, Revanta Banerji, Hemlata Gupta: Driver waveform computation for timing analysis with multiple voltage threshold driver models. DAC 2008: 425-428
28EEPeter Feldmann, Soroush Abbaspour: Towards a more physical approach to gate modeling for timing, noise, and power. DAC 2008: 453-455
27EEFrank Liu, Peter Feldmann: MAISE: An Interconnect Simulation Engine for Timing and Noise Analysis. ISQED 2008: 621-626
2006
26EEEmrah Acar, Peter Feldmann: Simulation of SOI transistor circuits through non-equilibrium initial condition analysis (NEICA). ISCAS 2006
2004
25EEPeter Feldmann: Model Order Reduction Techniques for Linear Systems with Large Numbers of Terminals. DATE 2004: 944-947
24EEPeter Feldmann, F. Liu: Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals. ICCAD 2004: 88-92
2002
23EEHans Georg Brachtendorf, S. Lampe, Rainer Laur, Robert C. Melville, Peter Feldmann: Steady State Calculation of Oscillators Using Continuation Methods. DATE 2002: 1139
2000
22EEAlper Demir, Peter Feldmann: Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits. DATE 2000: 340-344
21 Alper Demir, Peter Feldmann: Modelling and Analysis of Communication Circuit Performance Using Markov Chains and Efficient Graph Representations. ICCAD 2000: 290-295
1999
20EEPeter Feldmann, Sharad Kapur, David E. Long: Efficient Techniques for Modeling Chip-Level Interconnect, Substrate and Package Parasitics. DATE 1999: 418-417
19EELun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano: Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. DATE 1999: 658-663
18EEAlper Demir, Peter Feldmann: Modeling and simulation of the interference due to digital switching in mixed-signal ICs. ICCAD 1999: 70-75
1998
17EEAl Dunlop, Alper Demir, Peter Feldmann, Sharad Kapur, David E. Long, Robert C. Melville, Jaijeet S. Roychowdhury: Tools and Methodology for RF IC Design. DAC 1998: 414-420
16EERoland W. Freund, Peter Feldmann: Reduced-Order Modeling of Large Linear Passive Multi-Terminal Circuits Using Matrix-Pade Approximation. DATE 1998: 530-537
1997
15EEPeter Feldmann, Roland W. Freund: Circuit noise evaluation by Padé approximation based model-reduction techniques. ICCAD 1997: 132-138
1996
14EERoland W. Freund, Peter Feldmann: Reduced-order modeling of large passive linear circuits by means of the SYPVL algorithm. ICCAD 1996: 280-287
13EEPeter Feldmann, Jaijeet S. Roychowdhury: Computation of circuit waveform envelopes using an efficient, matrix-decomposed harmonic balance algorithm. ICCAD 1996: 295-300
1995
12EEPeter Feldmann, Roland W. Freund: Reduced-Order Modeling of Large Linear Subcircuits via a Block Lanczos Algorithm. DAC 1995: 474-479
11EEAbelardo Pardo, R. Iris Bahar, Srilatha Manne, Peter Feldmann, Gary D. Hachtel, Fabio Somenzi: CMOS dynamic power estimation based on collapsible current source transistor modeling. ISLPD 1995: 111-116
10EEPeter Feldmann, Roland W. Freund: Efficient linear circuit analysis by Pade approximation via the Lanczos process. IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 639-649 (1995)
1994
9EEPeter Feldmann, Roland W. Freund: Efficient linear circuit analysis by Pade´ approximation via the Lanczos process. EURO-DAC 1994: 170-175
8EERoland W. Freund, Peter Feldmann: Efficient small-signal circuit analysis and sensitivity computations with the PVL algorithm. ICCAD 1994: 404-411
1993
7EEPeter Feldmann, Stephen W. Director: Integrated circuit quality optimization using surface integrals. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1868-1879 (1993)
1992
6EEPeter Feldmann, Robert C. Melville, Shahriar Moinian: Automatic differentiation in circuit simulation and device modeling. ICCAD 1992: 248-253
5 Bob Melville, Peter Feldmann, Shahriar Moinian: AC++ Based Environment for Analog Circuit Simulation. ICCD 1992: 516-519
1991
4 Peter Feldmann, Stephen W. Director: Improved Methods for IC Yield and Quality Optimization Using Surface Integrals. ICCAD 1991: 158-161
3EEPeter Feldmann, Tuyen V. Nguyen, Stephen W. Director, Ronald A. Rohrer: Sensitivity computation in piecewise approximate circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 10(2): 171-183 (1991)
1990
2 Peter Feldmann, Stephen W. Director: Accurate and Efficient Evaluation of Circuit Yield and Yield Gradients. ICCAD 1990: 120-123
1 Chandramouli Visweswariah, Peter Feldmann, Ronald A. Rohrer: Incorporation of Inductors in Piecewise Approximate Circuit Simulation. ICCAD 1990: 162-165

Coauthor Index

1Soroush Abbaspour [28] [29]
2Emrah Acar [26]
3R. Iris Bahar [11]
4Revanta Banerji [29]
5Hans Georg Brachtendorf [23]
6Frank Cano [19]
7Rakesh Chadha [19]
8Foong-Charn Chang [19]
9Alper Demir [17] [18] [21] [22]
10Stephen W. Director [2] [3] [4] [7]
11Al Dunlop [17]
12Roland W. Freund [8] [9] [10] [12] [14] [15] [16]
13Hemlata Gupta [29]
14Gary D. Hachtel [11]
15Sharad Kapur [17] [20]
16S. Lampe [23]
17Rainer Laur [23]
18F. Liu [24]
19Frank Liu [27]
20David E. Long [17] [20]
21Srilatha Manne [11]
22Bob Melville [5]
23Robert C. Melville [6] [17] [23]
24Shahriar Moinian [5] [6]
25Tuyen V. Nguyen [3]
26Nagaraj Ns [19]
27Abelardo Pardo [11]
28Ronald A. Rohrer [1] [3]
29Jaijeet S. Roychowdhury [13] [17]
30Gregory Schaeffer [29]
31Debjit Sinha [29]
32Fabio Somenzi [11]
33Chandramouli Visweswariah [1]
34Lun Ye [19]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)